Abstract: Gate-all-around integrated circuit structures having depopulated channel structures and isolation structures are described. For example, an integrated circuit structure includes a first vertical arrangement of nanowires, the first vertical arrangement of nanowires having a dielectric structure or a conductive via in place of one or more of the nanowires, the dielectric structure having a dielectric liner and a dielectric fill. A first gate stack is over the first vertical arrangement of nanowires. A second vertical arrangement of nanowires is laterally spaced apart from the first vertical arrangement of nanowires, the second vertical arrangement of nanowires having nanowires horizontally corresponding to the nanowires and the conductive via of the first vertical arrangement of nanowires. A second gate stack is over the second vertical arrangement of nanowires.

Abstract: Gate-all-around integrated circuit structures having three-dimensional (3D) conductive contact structures are described. For example, an integrated circuit structure includes a first vertical stack of horizontal nanowires over a second vertical stack of horizontal nanowires. A first epitaxial source or drain structure is at an end of the first vertical stack of horizontal nanowires. A second epitaxial source or drain structure is at an end of the second vertical stack of horizontal nanowires. The second epitaxial source or drain structure is vertically beneath the first epitaxial source or drain structure. A conductive contact structure is through the first epitaxial source or drain structure and extending only partially into the second epitaxial source or drain structure.

Abstract: Integrated circuit structures having varied percentage-Ge silicon germanium nanowires, and methods of fabricating integrated circuit structures having varied percentage-Ge silicon germanium nanowires, are described. For example, an integrated circuit structure includes a stack of horizontal nanowires. A lower one of the horizontal nanowires has a relatively higher percentage-Ge silicon and germanium composition. An upper one of the horizontal nanowires has a relatively lower percentage-Ge silicon and germanium composition. An intermediate horizontal nanowire is vertically between the lower one of the horizontal nanowires and the upper one of the horizontal nanowires and has an intermediate percentage-Ge silicon and germanium composition between the relatively higher percentage-Ge silicon and germanium composition and the relatively lower percentage-Ge silicon and germanium composition. A gate structure is vertically around the stack of horizontal nanowires.

Abstract: Integrated circuit structures having source or drain structures with vertical trenches having contacts therein are described. In an example, an integrated circuit structure includes a stack of nanowires above a sub-fin. An epitaxial source or drain structure is at an end of the stack of nanowires, the epitaxial source or drain structure having a trench therein. A conductive contact is in the trench and extends above the epitaxial source or drain structure, or an epitaxial layer is along sides and a bottom the trench and a conductive contact is within the epitaxial layer and extends above the epitaxial layer, where the epitaxial layer includes gallium.

Abstract: A scale includes a weigh station for receiving items to be weighed, an operator interface configured to display information associated with scale operations, the operator interface comprising a touch-screen display, and a controller operably coupled to the operator interface to effect display of information thereon, the controller configured such that a home interface screen view is displayed on the operator interface. The home interface screen view includes one or more selectable regions that enable the operator to identify to the controller an item to be weighed. The home interface screen view includes no more than two pricing and labeling operation fields. In implementations, the controller is configured such that, upon operator identification of the item to be weighed via one of the one or more selectable regions, the controller effects display of an identified item screen interface view that includes at least five pricing and labeling operation fields.

Abstract: Gate-all-around integrated circuit structures having depopulated channel structures, and methods of fabricating depopulated channel structures using split source or drain approaches, are described. For example, an integrated circuit structure includes a first vertical arrangement of nanowires, the first vertical arrangement of nanowires having one or more dielectric nanowires coupled to a dielectric source or drain structure. A first gate stack is over the first vertical arrangement of nanowires. A second vertical arrangement of nanowires is laterally spaced apart from the first vertical arrangement of nanowires, the second vertical arrangement of nanowires having one or more semiconductor nanowires coupled to an epitaxial source or drain structure, the one or more semiconductor nanowires horizontally corresponding to the one or more dielectric nanowires, and the epitaxial source or drain structure laterally spaced apart from the dielectric source or drain structure.

Abstract: IC structures with nanoribbon stacks without dielectric protection caps for top nanoribbons, and associated methods and devices, are disclosed. An example IC structure includes a stack of nanoribbons, an opening over the top nanoribbon of the stack of nanoribbons, and a gate electrode material in the opening, where the opening has a first portion, a second portion, and a third portion, the second portion is between the first portion and the third portion, and where a width of a portion of the gate electrode material in the second portion is smaller than a width of a portion of the gate electrode material in the first portion. In such an IC structure, a gate insulator on the sidewalls of the first portion of the opening is materially discontinuous from a gate insulator on the sidewalls of the third portion of the opening.

Abstract: Disclosed herein are transistor gate-channel arrangements with transistor gate stacks that include multiple dipole materials, and related methods and devices. For example, in some embodiments, a transistor gate-channel arrangement may include a channel material and a transistor gate stack. The transistor gate stack may include a gate electrode material and a gate dielectric material between the gate electrode material and the channel material, where the gate dielectric material includes a first dipole material and a second dipole material where one of the first and second dipole materials is a P-shifter dipole material and the other one is an N-shifter dipole material.

Abstract: A system and method for implementing a scale based order assignment and fulfillment system is provided. The method includes receiving (via a user interface from a user) a request for an item from an entity. A database comprising links between zones is scanned and in response, a unit is assigned to a zone associated with a location of the item. The assignment results in the transmission of digital instructions to an electronic scale apparatus located within the zone and associated with the unit. The digital instructions executed for activating the electronic scale apparatus to enable a user to dynamically fulfil the request for the first item.

Abstract: A scale-based order management and fulfillment system includes a computer system configured as an order manager, the computer system connected for electronic receipt of customer orders from one or more external devices or systems; and a plurality of scales within a store. The computer system is configured to dynamically process customer orders for fulfillment.