Patents by Inventor Evan E. Patton

Evan E. Patton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160254125
    Abstract: A method for providing a protective layer over a substrate is provided. A ceramic layer is deposited over the substrate, wherein the ceramic layer has a porosity. A localized heating of a region of the ceramic layer to a temperature that causes the ceramic layer to melt without damaging the substrate is provided, wherein the melting the ceramic layer reduces the porosity or seals fissures or columnar grain boundaries. The region of the ceramic layer heated by the localized heating is scanned over the ceramic layer.
    Type: Application
    Filed: February 27, 2015
    Publication date: September 1, 2016
    Inventors: Lihua Li HUANG, Evan E. PATTON, Alan POPIOLKOWSKI, Brett C. RICHARDSON, Hong SHIH
  • Patent number: 8883640
    Abstract: Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: November 11, 2014
    Assignee: Novellus Systems, Inc.
    Inventors: Evan E. Patton, Theodore Cacouris, Eliot Broadbent, Steven T. Mayer
  • Patent number: 8450210
    Abstract: Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: May 28, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Evan E. Patton, Theodore Cacouris, Eliot Broadbent, Steven T. Mayer
  • Publication number: 20120279864
    Abstract: Several techniques are described for reducing or mitigating the formation of seams and/or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams/voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.
    Type: Application
    Filed: October 31, 2011
    Publication date: November 8, 2012
    Inventors: Steven T. Mayer, Vijay Bhaskaran, Evan E. Patton, Robert L. Jackson, Jonathan Reid
  • Patent number: 8048280
    Abstract: Several techniques are described for reducing or mitigating the formation of seams and/or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams/voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: November 1, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Vijay Bhaskaran, Evan E. Patton, Robert L. Jackson, Jonathan Reid
  • Patent number: 8026174
    Abstract: Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: September 27, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Evan E. Patton, Theodore Cacouris, Eliot Broadbent, Steven T. Mayer
  • Patent number: 7696538
    Abstract: Liquid detection sensors are attached to both sides of a robotic arm end effector of a semiconductor wafer process system. The sensor mechanism or probe is situated on the front side and backside of the end effector, designed with electrical lines that are traced onto a polyester base material. The electrical lines are positioned in a serpentine formation. The high conductance of the sulfuric acid in the copper sulfate solution acts as the conductor between the traced lines. When the conductive liquid comes in contact with the traced lines, the lines short and the sensor activates or turns on.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: April 13, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Won Lee, Evan E Patton
  • Patent number: 7686927
    Abstract: The orientation of a wafer with respect to the surface of an electrolyte is controlled during an electroplating process. The wafer is delivered to an electrolyte bath along a trajectory normal to the surface of the electrolyte. Along this trajectory, the wafer is angled before entry into the electrolyte for angled immersion. A wafer can be plated in an angled orientation or not, depending on what is optimal for a given situation. Also, in some designs, the wafer's orientation can be adjusted actively during immersion or during electroplating, providing flexibility in various electroplating scenarios.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: March 30, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Jonathan D. Reid, Steven T. Mayer, Seshasayee Varadarajan, David C. Smith, Evan E. Patton, Dinesh S. Kalakkad, Gary Lind, Richard S. Hill
  • Patent number: 7189647
    Abstract: Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: March 13, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: Evan E. Patton, Theodore Cacouris, Eliot Broadbent, Steven T. Mayer
  • Patent number: 7097410
    Abstract: The orientation of a wafer with respect to the surface of an electrolyte is controlled during an electroplating process. The wafer is delivered to an electrolyte bath along a trajectory normal to the surface of the electrolyte. Along this trajectory, the wafer is angled before entry into the electrolyte for angled immersion. A wafer can be plated in an angled orientation or not, depending on what is optimal for a given situation. Also, in some designs, the wafer's orientation can be adjusted actively during immersion or during electroplating, providing flexibility in various electroplating scenarios.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: August 29, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Jonathan D. Reid, Steven T. Mayer, Seshasayee Varadarajan, David C. Smith, Evan E. Patton, Dinesh S. Kalakkad, Gary Lind, Richard S. Hill
  • Patent number: 7084466
    Abstract: Liquid detection sensors are attached to both sides of a robotic arm end effector of a semiconductor wafer process system. The sensor mechanism or probe is situated on the front side and backside of the end effector, designed with electrical lines that are traced onto a polyester base material. The electrical lines are positioned in a serpentine formation. The high conductance of the sulfuric acid in the copper sulfate solution acts as the conductor between the traced lines. When the conductive liquid comes in contact with the traced lines, the lines short and the sensor activates or turns on.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: August 1, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Won Lee, Evan E Patton
  • Patent number: 7033465
    Abstract: Certain mechanisms of a plating apparatus address problems associated with interaction between plating solutions or other processing solutions and the components of the plating apparatus (such as the electrical contacts). For example, a circumferential spray skirt around the interface of a “cup” and “cone” in the plating apparatus protects these features during plating. A shield mechanism contacts the cup and/or cone at the periphery of their interface to provide a fluid resistant seal. In some cases, the cone includes an outer circumferential lip that engages a complementary surface of the cup for this purpose. Further, a mechanism is provided for raising and lowering the work piece with the cone in order to allow in situ rinsing of the work piece and/or regions of the cup.
    Type: Grant
    Filed: December 2, 2002
    Date of Patent: April 25, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Evan E. Patton, Jonathan D. Reid, Jeffrey A. Hawkins, Dinesh S. Kalakkad
  • Patent number: 6964792
    Abstract: The present invention provides apparatus and methods for controlling flow dynamics of a plating fluid during a plating process. The invention achieves this fluid control through use of a diffuser membrane. Plating fluid is pumped through the membrane; the design and characteristics of the membrane provide a uniform flow pattern to the plating fluid exiting the membrane. Thus a work piece, upon which a metal or other conductive material is to be deposited, is exposed to a uniform flow of plating fluid.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: November 15, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, R. Marshall Stowell, Evan E. Patton, Seshasayee Varadarajan
  • Patent number: 6946065
    Abstract: Several techniques are described for reducing or mitigating the formation of seams and/or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams/voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: September 20, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Vijay Bhaskaran, Evan E. Patton, Robert L. Jackson, Jonathan Reid
  • Patent number: 6890416
    Abstract: An electroplating apparatus prevents anode-mediated degradation of electrolyte additives by creating a mechanism for maintaining separate anolyte and catholyte and preventing mixing thereof within a plating chamber. The separation is accomplished by interposing a porous chemical transport barrier between the anode and cathode. The transport barrier limits the chemical transport (via diffusion and/or convection) of all species but allows migration of ionic species (and hence passage of current) during application of sufficiently large electric fields within electrolyte.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: May 10, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Evan E. Patton, Robert L. Jackson, Jonathan D. Reid
  • Patent number: 6800187
    Abstract: An apparatus for engaging a work piece during plating facilitates electrolyte flow during a plating operation. The apparatus helps to control the plating solution fluid dynamics and electric field shape to keep the wafer's local plating environment uniform and bubble free. The apparatus holding the work piece in a manner that facilitates electrolyte circulation patterns in which the electrolyte flows from the center of the work piece plating surface, outward toward the edge of the edge of the work piece. The apparatus holds the work piece near the work piece edges and provides a flow path for electrolyte to flow outward away from the edges of the work piece plating surface. That flow path has a “snorkel” shape in which the outlet is higher than the inlet. In addition, the flow path may have a slot shape that spans much or all of the circumference of holding apparatus. It may be made from a material that resists deformation and corrosion such as certain ceramics.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: October 5, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Jonathan D. Reid, Steven T. Mayer, R. Marshall Stowell, Evan E. Patton, Jeff A. Hawkins
  • Patent number: 6773571
    Abstract: The present invention pertains to methods and apparatus for electroplating a substantially uniform layer of a metal onto a work piece having a seed layer thereon. The total current of a plating cell is distributed among a plurality of anodes in the plating cell in order to tailor the current distribution in the plating electrolyte to compensate for resistance and voltage variation across a work piece due to the seed layer. Focusing elements are used to create “virtual anodes” in proximity to the plating surface of the work piece to further control the current distribution in the electrolyte during plating.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: August 10, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Evan E. Patton, Brian Paul Blackman, Jonathan D. Reid, Thomas Anand Ponnuswamy, Harold D. Perry
  • Patent number: 6755946
    Abstract: The present invention includes apparatus and methods for measuring impedance of a layer of deposited metal on a substrate and controlling deposition uniformity during electroplating. A first circuit delivers plating current to a metal layer on the substrate, and a second circuit, electrically isolated from the first, measures the impedance. Methods of the invention provide multi-point sheet resistance measurements before and during an electroplating process on a substrate. In a specific example, resistance is measured via a copper seed layer during electroplating.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: June 29, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Evan E. Patton, Jonathan D. Reid, Jeffrey A. Hawkins, Dinesh S. Kalakkad, Steven T. Mayer
  • Patent number: 6716334
    Abstract: A plating cell has an inner plating bath container for performing electroplating on a work piece (e.g., a wafer) submerged in a solution contained by the inner plating bath container. A reclaim inlet funnels any solution overflowing the inner plating bath container back into a reservoir container to be circulated back into the inner plating bath container. A waste channel is also provided having an inlet at a different height than the inlet of the reclaim channel. After electroplating, the wafer is lifted to a position and spun. While spinning, the wafer is thoroughly rinse with, for example, ultra pure water. The spin rate and height of the wafer determine whether the water and solution are reclaimed through the reclaim channel or disposed through the waste channel.
    Type: Grant
    Filed: April 9, 2001
    Date of Patent: April 6, 2004
    Assignee: Novellus Systems, Inc
    Inventors: Jonathan D. Reid, Steven W. Taatjes, Robert J. Contolini, Evan E. Patton
  • Patent number: 6589401
    Abstract: An apparatus for electroplating a wafer surface includes a cup having a central aperture defined by an inner perimeter, a compliant seal adjacent the inner perimeter, contacts adjacent the compliant seal and a cone attached to a rotatable spindle. The compliant seal forms a seal with the perimeter region of the wafer surface preventing plating solution from contaminating the wafer edge, wafer backside and the contacts. As a further measure to prevent contamination, the region behind the compliant seal is pressurized. By rotating the wafer during electroplating, bubble entrapment on the wafer surface is prevented. Further, the contacts can be arranged into banks of contacts and the resistivity between banks can be tested to detect poor electrical connections between the contacts and the wafer surface.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: July 8, 2003
    Assignee: Novellus Systems, Inc.
    Inventors: Evan E. Patton, Wayne Fetters