Patents by Inventor Evan Liu

Evan Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11981684
    Abstract: The present disclosure relates to certain macrocyclic compounds that inhibit SRC and MET, and/or CSF1R, pharmaceutical compositions containing such compounds, and methods of using such compounds to treat cancer.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: May 14, 2024
    Assignee: TURNING POINT THERAPEUTICS, INC.
    Inventors: Jingrong Jean Cui, Evan W. Rogers, Jane Ung, Jeffrey Whitten, Dayong Zhai, Wei Deng, Xin Zhang, Zhongdong Huang, Jing Liu, Han Zhang
  • Publication number: 20240135960
    Abstract: The disclosure provides technology for enhancing the ability of a computing device to detect when a user has discontinued reading a text source. An example method includes receiving audio data comprising a spoken word associated with a text source, comparing the audio data with data of the text source, determining, based on the comparing, whether a segment of the audio data corresponds to a location of the text source, and responsive to determining that the segment of the audio data does not correspond to a location of the text source, transmitting a signal indicating that a user has discontinued reading the text source, the signal causing to cease the comparing of the audio data with the data of the text source.
    Type: Application
    Filed: December 29, 2023
    Publication date: April 25, 2024
    Inventors: Chaitanya GHARPURE, Evan FISHER, Eric LIU, Peng YANG, Emily HOU, Victoria FANG
  • Publication number: 20240086503
    Abstract: A computing system receives a request to verify a user, the request comprising an indication of a jurisdiction in which the user will be verified. Based on the request, the computing system collects information related to the user. Based on the request, the computing system identifies a workflow corresponding to the jurisdiction. The workflow defines conditions for obtaining a verified status in the jurisdiction. The computing system executes the workflow to verify the user. The computing system hashes the verification record using a zero-knowledge proof protocol. The computing system generates a non-fungible token corresponding to the verification record. The non-fungible token is associated with a hashed version of the verification record. The computing system broadcasts the non-fungible token to a blockchain.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 14, 2024
    Applicant: HSBC Software Development (Guangdong) Limited
    Inventors: Benjamin Evans Chodroff, Yong Xia, Wei Ming Zhuang, Ying Li Liu
  • Patent number: 11930620
    Abstract: There is disclosed in one example a heat dissipator for an electronic apparatus, including: a planar vapor chamber having a substantially rectangular form factor, wherein a second dimension d2 of the rectangular form factor is at least approximately twice a first dimension d1 of the rectangular form factor; a first fan and second fan; and a first heat pipe and second heat pipe discrete from the planar vapor chamber and disposed along first and second d1 edges of the planar vapor chamber, further disposed to conduct heat from the first and second d1 edges to the first and second fan respectively.
    Type: Grant
    Filed: June 27, 2020
    Date of Patent: March 12, 2024
    Assignee: Intel Corporation
    Inventors: Jeff Ku, Cora Nien, Gavin Sung, Tim Liu, Lance Lin, Wan Yu Liu, Gerry Juan, Jason Y. Jiang, Justin M. Huttula, Evan Piotr Kuklinski, Juha Tapani Paavola, Arnab Sen, Hari Shanker Thakur, Prakash Kurma Raju
  • Publication number: 20240070834
    Abstract: A computer-implemented method in which one or more processing devices perform operations may include obtaining a field image of a railcar collected from a field camera system and applying a machine-learning algorithm to the field image to generate a machine-learning algorithm output. The method may also include performing a post-processing operation on the machine-learning algorithm output to generate a filtered machine-learning algorithm output. Further, the method may include detecting a defect of the railcar using the filtered machine-learning algorithm output.
    Type: Application
    Filed: May 10, 2023
    Publication date: February 29, 2024
    Inventors: Mahbod Amouie, Evan T. Gebhardt, Gongli Duan, Myles Grayson Akin, Wei Liu, Tianchen Wang, Mayuresh Manoj Sardesai, Ilya A. Lavrik
  • Publication number: 20130243207
    Abstract: An analysis system and method for audio data related to a user is provided, so that the user can be classified as one of multiple classes with an assumed probability based on the analysis result. The analysis system comprises an audio transformer (110) adapted to transform the audio data related to the user into spectra data; a pattern recognizer (120) adapted to decompose the spectra data to predetermined eigenvectors to get the decomposition pattern of the spectra data; a scorer (130) adapted to calculate the assumed scores of the multiple classes related to the user based on the decomposition pattern of the spectra data and the attributes of the user using a trained model.
    Type: Application
    Filed: November 25, 2010
    Publication date: September 19, 2013
    Applicant: Telefonaktiebolaget L M Ericsson (PUBL)
    Inventors: Evan Liu, Qiang Li, Olof Lundstrom, Tandy Mai
  • Patent number: 7117587
    Abstract: A method for fabricating a substrate, which includes a plurality of chip package substrates. One combined PCB includes a multi-layer rigid PCB and a soft PCB. The multi-layer rigid PCB is fixed on the soft PCB. At least one grooves or a pair is formed on an upper surface of the multi-layer rigid PCB. A portion of the multi-layer rigid PCB between the grooves is milled to expose a corresponding portion of the soft PCB to define an exposed area. The combined PCB is drilled through along two opposite sides of the grooves and the corresponding exposed area of the soft PCB. Breakable parts are formed at a center of the corresponding portion of the soft PCB and two opposite outside edges of the grooves.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: October 10, 2006
    Assignee: Lite-On Semiconductor Corp.
    Inventors: Huei-Jen Chen, Evan Liu, Yvon Chen
  • Patent number: 7075176
    Abstract: A chip package substrate having a soft circuit board jas a multi-layer soft and hard composite PCB, a plurality of conducting components and a plurality of conducting holes. The conducting holes are formed in the multi-layer soft and hard composite PCB. The conducting components are electroplated on the inner edges of the conducting holes on the multi-layer soft and hard composite PCB. An image-sensing chip can thus be packaged on the chip package substrate with the soft circuit board used as external signal connection lines, thereby saving the manufacturing cost and increasing the yield thereof.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: July 11, 2006
    Assignee: Lite-On Semiconductor Corp.
    Inventors: Huei-Jen Chen, Evan Liu, Yvon Chen
  • Publication number: 20060006487
    Abstract: A chip package substrate having a soft circuit board jas a multi-layer soft and hard composite PCB, a plurality of conducting components and a plurality of conducting holes. The conducting holes are formed in the multi-layer soft and hard composite PCB. The conducting components are electroplated on the inner edges of the conducting holes on the multi-layer soft and hard composite PCB. An image-sensing chip can thus be packaged on the chip package substrate with the soft circuit board used as external signal connection lines, thereby saving the manufacturing cost and increasing the yield thereof.
    Type: Application
    Filed: July 26, 2005
    Publication date: January 12, 2006
    Applicant: LITE-ON SEMICONDUCTOR CORP.
    Inventors: Huei-Jen Chen, Evan Liu, Yvon Chen
  • Publication number: 20050001278
    Abstract: A chip package substrate having a soft circuit board jas a multi-layer soft and hard composite PCB, a plurality of conducting components and a plurality of conducting holes. The conducting holes are formed in the multi-layer soft and hard composite PCB. The conducting components are electroplated on the inner edges of the conducting holes on the multi-layer soft and hard composite PCB. An image-sensing chip can thus be packaged on the chip package substrate with the soft circuit board used as external signal connection lines, thereby saving the manufacturing cost and increasing the yield thereof.
    Type: Application
    Filed: September 5, 2003
    Publication date: January 6, 2005
    Inventors: Huei-Jen Chen, Evan Liu, Yvon Chen