Abstract: A transaction is sent over a communication link to a receiving node. The transaction includes data along with a tag identifying a data type of the data. The receiving node either forwards or processes the data according to whether the data type matches the type of data type processed by circuitry associated with the receiving node. Thus, a destination is determined for data transported on the communication link using a data type identifier sent with the data.

Abstract: A computer system has multiple performance states. The computer system periodically determines utilization information for the computer system and adjusts the performance state according to the utilization information. If a performance increase is required, the computer system always goes to the maximum performance state. If a performance decrease is required, the computer system steps the performance state down to a next lower performance state.

Abstract: A computer system has multiple performance states. The computer system periodically determines utilization information for the computer system and adjusts the performance state according to the utilization information. If a performance increase is required, the computer system always goes to the maximum performance state. If a performance decrease is required, the computer system steps the performance state down to a next lower performance state.

Abstract: An information processing system is configured to schedule tasks to a plurality of processors using processor performance information. For example, the maximum performance level of each of the processors, the current performance level of each of the processors, and the number of processors can be used to schedule tasks to one or more of the processors. A task distribution frequency which takes this information into account can be useful. One such task distribution frequency fi is calculated so that fi=Di/?Di where i ranges from 1-N and Di=MPi/CPi/N, where MPi is a maximum performance level for the processor i, CPi is a current performance level for the processor i, and N is the number of processors. Tasks are distributed according to the task distribution frequency fi.

Abstract: A computer system has multiple performance states. The computer system periodically determines utilization information for the computer system and adjusts the performance state according to the utilization information. If a performance increase is required, the computer system always goes to the maximum performance state. If a performance decrease is required, the computer system steps the performance state down to a next lower performance state.

Abstract: A task queue management technique leverages infrastructure provided by file and operating systems to manage task queues substantially without otherwise typical problems regarding management of the size of the queue and/or the state of the queue (e.g., empty or full) while maintaining, regulating and altering the queue and the order of tasks in the queue. Task producer code is configurable to cause one or more executable files corresponding to each of one or more tasks to be stored in a queue directory responsive to receiving the one or more tasks. A file system associates each executable file with a time stamp indicating when the executable file was stored. Task consumer code is configurable to execute the one or more executable files in an order indicated by the time stamps associated with the executable files and to remove each executable file after execution of each executable file.

Abstract: A dependency instruction encodes dependency information among a group of instructions. A processor decodes the dependency instruction associated with the group of instructions. The processor can then execute the group of instructions in an order based on the dependency information in the dependency instruction. The dependency information may be encoded in a neutral instruction so processors that do not support dependency instructions can execute a program containing them.

Abstract: An integrated circuit includes a plurality of functional blocks. Utilization information for the various functional blocks is generated. Based on that information, the power consumption and thus the performance levels of the functional blocks can be tuned. Thus, when a functional block is heavily loaded by an application, the performance level and thus power consumption of that particular functional block is increased. At the same time, other functional blocks that are not being heavily utilized and thus have lower performance requirements can be kept at a relatively low power consumption level. Thus, power consumption can be reduced overall without unduly impacting performance.

Abstract: A computer system that has multiple performance states periodically obtains utilization information for a plurality of tasks operating on the processor and determines processor utilization according to the utilization information for the plurality of tasks. The system compares the processor utilization to at least one threshold and selectively adjusts a current processor performance state to another performance state according to the comparison.

Abstract: A computer system has multiple performance states. The computer system periodically determines if the software power state maintained by power management software that represents the power state of the processor or other computer system component matches the actual power state of the processor or other computer system component. If not, the actual power state and the software power state are resynchronized, for example, by reinitializing the power management software or otherwise causing the software power state to match the hardware power state.

Abstract: An integrated circuit includes a plurality of functional blocks. Utilization information for the various functional blocks is generated. Based on that information, the power consumption and thus the performance levels of the functional blocks can be tuned. Thus, when a functional block is heavily loaded by an application, the performance level and thus power consumption of that particular functional block is increased. At the same time, other functional blocks that are not being heavily utilized and thus have lower performance requirements can be kept at a relatively low power consumption level. Thus, power consumption can be reduced overall without unduly impacting performance.

Abstract: An integrated circuit includes a plurality of functional blocks. Utilization information for the various functional blocks is generated. Based on that information, the power consumption and thus the performance levels of the functional blocks can be tuned. Thus, when a functional block is heavily loaded by an application, the performance level and thus power consumption of that particular functional block is increased. At the same time, other functional blocks that are not being heavily utilized and thus have lower performance requirements can be kept at a relatively low power consumption level. Thus, power consumption can be reduced overall without unduly impacting performance.