Abstract: A method of manufacturing a magnetoresistive-based device includes a metal hard mask that is inert to a top electrode etch chemistry and that has low sputter yield during a magnetic stack sputter. The metal hard mask is patterned by the photo resist and the photo mask is then stripped and the top electrode (overlying magnetic materials of the magnetoresistive-based device) is patterned by the metal hard mask.

Abstract: An architecture and method includes providing an oscillatory signal through each magnetic tunnel junction (MTJ), or in a line adjacent each MTJ, in a magnetoresistive random access memory array. A rectified signal appearing across each MTJ is measured and compared to a reference signal for determining the state of the MTJ.

Abstract: Circuitry and a method for regulating voltages applied to source and bit lines of a spin-torque magnetoresistive random access memory (ST-MRAM) reduces time-dependent dielectric breakdown stress of the word line transistors. During a read or write operation, only the selected bit lines and source lines are pulled down to a low voltage and/or pulled up to a high voltage depending on the operation (write 0, write 1, and read) being performed. The unselected bit lines and source lines are held at the voltage while separately timed signals pull up or pull down the selected bit lines and source lines during read and write operations.

Abstract: An analog read circuit measures the resistance of each of a plurality of bits in an array of resistive memory elements. Data stored within a latch determines whether to selectively enable the analog read circuit. In an alternate embodiment, a sense amplifier is coupled to the latch and the array, and the data stored in the latch determines whether to selectively enable the sense amplifier.

Abstract: A method of reading data from a plurality of bits in a spin-torque magnetoresistive memory array includes performing one or more referenced read operations of the bits, and performing a self-referenced read operation, for example, a destructive self-referenced read operation, of any of the bits not successfully read by the referenced read operation. The referenced read operations can be initiated at the same time or prior to that of the destructive self-referenced read operation.

Abstract: A write driver for writing to a spin-torque magnetoresistive random access memory (ST-MRAM) minimizes sub-threshold leakage of the unselected (off) word line select transistors in the selected column. An effective metal resistance in the bit line and/or source line is reduced and power supply noise immunity is increased. Write driver bias signals are isolated from global bias signals, and a first voltage is applied at one end of a bit line using one of a first NMOS-follower circuit or a first PMOS-follower circuit. A second voltage is applied at opposite ends of a source line using, respectively, second and third PMOS-follower circuits, or second and third NMOS-follower circuits.