Abstract: An antifuse is provided which includes a first conductive layer, an antifuse layer formed on the first conductive layer, and a second conductive layer formed on the antifuse layer. A portion of the antifuse layer forms a substantially orthogonal angle with the first conductive layer and the second conductive layer. This "corner" formation of the antifuse enhances the electric field at this location during programming, thereby providing a predictable location for the filament, i.e. the conductive path between the first and second conductive layers. This antifuse provides other advantages including: a relatively low programming voltage, good step coverage for the antifuse layer and the upper conductive layer, a low, stable resistance value, and minimal shearing effects on the filament.

Abstract: An antifuse for programmable integrated circuit devices is formed above a refractory metal on a thin native oxide layer and comprises an amorphous compound resulting from an PECVD deposition using a combination of silane gas and nitrogen. After formation of the amorphous antifuse layer, the layer is implanted with an atomic species such as argon. The thin oxide layer is formed on the surface of a refractory metal, therefore the process of forming the oxide is slow, the oxide is of even thickness, and the thickness can be controlled precisely. In a preferred embodiment, a second thin oxide layer is formed above the doped amorphous layer. The oxide layers significantly reduce the leakage current of an unprogrammed antifuse. Because of these thin oxide layers and the implantation step, the amorphous layer may be as thin as 200 .ANG..

Abstract: An antifuse is provided which includes a first conductive layer, an antifuse layer formed on the first conductive layer, and a second conductive layer formed on the antifuse layer. A portion of the antifuse layer forms a substantially orthogonal angle with the first conductive layer and the second conductive layer. This "corner" formation of the antifuse enhances the electric field at this location during programming, thereby providing a predictable location for the filament, i.e. the conductive path between the first and second conductive layers. This antifuse provides other advantages including: a relatively low programming voltage, good step coverage for the antifuse layer and the upper conductive layer, a low, stable resistance value, and minimal shearing effects on the filament.