Abstract: Methods, systems, and devices for voltage detection for managed memory systems are described. In some cases, a memory system may include circuitry to monitor one or more supply voltages to the memory system or voltages generated by the memory system to determine whether a voltage rises above an operational range. In some cases, an overvoltage detector may include an undervoltage detector that has been tuned or manufactured to have a higher threshold than an undervoltage detector used to determine whether a voltage has fallen below the operational range. Accordingly, the memory system may monitor a voltage using an undervoltage detector having a threshold corresponding to a lower bound or lower operation point of the operational range of the monitored voltage and an overvoltage detectors having a threshold corresponding to the upper bound or upper operational point of the operational range.

Abstract: Methods, systems, and devices for voltage detection for managed memory systems are described. In some cases, a memory system may include circuitry to monitor one or more supply voltages to the memory system or voltages generated by the memory system to determine whether a voltage rises above an operational range. In some cases, an overvoltage detector may include an undervoltage detector that has been tuned or manufactured to have a higher threshold than an undervoltage detector used to determine whether a voltage has fallen below the operational range. Accordingly, the memory system may monitor a voltage using an undervoltage detector having a threshold corresponding to a lower bound or lower operation point of the operational range of the monitored voltage and an overvoltage detectors having a threshold corresponding to the upper bound or upper operational point of the operational range.

Abstract: A method for detecting electrical disconnections of a chip during testing under environmental conditions includes providing n monitor connections on a chip from which a voltage or current can be sensed during testing of the chip under environmental conditions, where n is an integer of at least one. M sensing connections are provided on the chip, where m>n. An electrical circuit for electrically connects the n monitor connections with the m sensing connections. The electrical circuit has a characteristic that changes when one or more of the m sensing connections is disconnected from its corresponding contact on the printed circuit board or chip socket. The electrical circuit is monitored via the n monitor connections during the testing. It is determined based on changes in the characteristic, whether one or more of the m sensing connections is disconnected from the printed circuit board or chip socket.

Abstract: A method for detecting electrical disconnections of a chip during testing under environmental conditions includes providing n monitor connections on a chip from which a voltage or current can be sensed during testing of the chip under environmental conditions, where n is an integer of at least one. M sensing connections are provided on the chip, where m>n. An electrical circuit for electrically connects the n monitor connections with the m sensing connections. The electrical circuit has a characteristic that changes when one or more of the m sensing connections is disconnected from its corresponding contact on the printed circuit board or chip socket. The electrical circuit is monitored via the n monitor connections during the testing. It is determined based on changes in the characteristic, whether one or more of the m sensing connections is disconnected from the printed circuit board or chip socket.

Abstract: A circuit system for testing a chip is provided. The circuit system includes a first layer coupled with a plurality of ground communication mediums. Each ground communication medium facilitates communication of a ground signal. The circuit system includes a second layer coupled with a first integrated circuit chip. The second layer is coupled with a plurality of radio frequency (RF) communication mediums. The RF communication mediums facilitate communication of RF signals. The first integrated circuit chip communicates via one of the RF signals and the ground signal with a second integrated circuit chip. The first and second layers are used to probe the RF signals and the ground signal.

Abstract: A circuit system for testing a chip is provided. The circuit system includes a first layer coupled with a plurality of ground communication mediums. Each ground communication medium facilitates communication of a ground signal. The circuit system includes a second layer coupled with a first integrated circuit chip. The second layer is coupled with a plurality of radio frequency (RF) communication mediums. The RF communication mediums facilitate communication of RF signals. The first integrated circuit chip communicates via one of the RF signals and the ground signal with a second integrated circuit chip. The first and second layers are used to probe the RF signals and the ground signal.

Abstract: A communications transceiver constructed to minimize the additional external components required for interfacing to the communications medium. The invention includes a communications transceiver with a reduced number of filters comprising a host interface, a control module, a transmit portion and a receive portion. The host interface is coupled to a host computer and functions to exchange transmit, receive and control related data to and from the transceiver. A novel aspect of the invention includes using the same filter for both receiving and transmitting. The single filter plays a dual role, providing filtering function during both receive operation and transmit operation, thus serving to minimize the external components required, the cost of the device and its complexity. A switching device, such as an analog switch, connects the filter either to the output of the transmitter during transmit operation or to the output of the communications medium interface during receive operation.