Patents by Inventor Evgueny E. Egorov

Evgueny E. Egorov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7340706
    Abstract: The present invention provides a method and system for analyzing the quality of an OPC mask. The method includes receiving a target layer from a target design, receiving an OPC mask layer from the OPC mask. The method also includes classifying each cell of at least one of the target layer and the OPC mask layer as either repeating or non-repeating, and for each repeating cell, recognizing geometric points in the target layer to determine quality measuring groups. The method also includes simulating the OPC mask layer based on the quality measuring groups, measuring edge placement errors (EPEs) based on at least one of the geometric points, and providing an EPE layer representing EPEs greater than an EPE threshold.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: March 4, 2008
    Assignee: LSI Logic Corporation
    Inventors: Ilya Golubtsov, Stanislav V. Aleshin, Ranko Scepanovic, Sergei Rodin, Marina Medvedeva, Sergey V. Uzhakov, Evgueny E. Egorov, Nadya Strelkova
  • Patent number: 6898780
    Abstract: A method and system for performing optical proximity correction (OPC) on an integrated circuit (IC) chip design is disclosed. The system and method of the present invention includes exploding calls on an element list to generate an expanded element list, defining a local cover area for each call on the expanded element list, classifying congruent local cover areas into corresponding groups, and performing an OPC procedure for one local cover area in each group By defining the local cover area for each call and grouping congruent local cover areas, only one OPC procedure (e.g., evaluation and correction) needs to be performed per group of congruent local cover areas. The amount of data to be evaluated and the number of corrections performed is greatly reduced because OPC is not performed on repetitive portions of the IC chip design, thereby resulting in significant savings in computing resources and time.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: May 24, 2005
    Assignee: LSI Logic Corporation
    Inventors: Evgueny E. Egorov, Stanislav V. Aleshin, Ranko Scepanovic
  • Patent number: 6813758
    Abstract: The present invention is directed to an optical proximity correction driven hierarchy. A method for constructing a hierarchy of optically independent structures for use in optical proximity correction of a circuit may include receiving an integrated circuit design, the design including geometric circuit elements for providing circuit functions of an integrated circuit. At least a portion of the integrated circuit design is exploded and geometric circuit elements of the exploded integrated circuit design are gathered into optically independent classes. A search is then performed for congruency for each optically independent class.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: November 2, 2004
    Assignee: LSI Logic Corporation
    Inventors: Stanislav V. Aleshin, Evgueny E. Egorov, Marina Medvedeva
  • Patent number: 6785871
    Abstract: A method of finding an optically periodic structure in a cell layer of an integrated circuit design includes receiving as input a physical representation of a cell layer of an integrated circuit design, finding reference coordinates of a selected portion of the cell layer from the physical representation of a cell layer, selecting an initial element located nearest to the reference coordinates, and constructing a base structure that includes the initial element and a minimum number of elements in the physical representation of the cell layer wherein the base structure may be replicated at an X-offset and a Y-offset to fill the entire selected portion so that for each element in each replica of the base structure there is an identical element at identical coordinates in the physical representation of the cell layer.
    Type: Grant
    Filed: August 21, 2002
    Date of Patent: August 31, 2004
    Assignee: LSI Logic Corporation
    Inventors: Sergei Rodin, Evgueny E. Egorov, Stanislav V. Aleshin
  • Publication number: 20040123266
    Abstract: A method and system for performing optical proximity correction (OPC) on an integrated circuit (IC) chip design is disclosed. The system and method of the present invention includes exploding calls on an element list to generate an expanded element list, defining a local cover area for each call on the expanded element list, classifying congruent local cover areas into corresponding groups, and performing an OPC procedure for one local cover area in each group.
    Type: Application
    Filed: December 20, 2002
    Publication date: June 24, 2004
    Inventors: Evgueny E. Egorov, Stanislav V. Aleshin, Ranko Scepanovic
  • Publication number: 20040040002
    Abstract: A method of finding an optically periodic structure in a cell layer of an integrated circuit design includes receiving as input a physical representation of a cell layer of an integrated circuit design, finding reference coordinates of a selected portion of the cell layer from the physical representation of a cell layer, selecting an initial element located nearest to the reference coordinates, and constructing a base structure that includes the initial element and a minimum number of elements in the physical representation of the cell layer wherein the base structure may be replicated at an X-offset and a Y-offset to fill the entire selected portion so that for each element in each replica of the base structure there is an identical element at identical coordinates in the physical representation of the cell layer.
    Type: Application
    Filed: August 21, 2002
    Publication date: February 26, 2004
    Inventors: Sergei Rodin, Evgueny E. Egorov, Stanislav V. Aleshin
  • Publication number: 20030177451
    Abstract: The present invention is directed to an optical proximity correction driven hierarchy. A method for constructing a hierarchy of optically independent structures for use in optical proximity correction of a circuit may include receiving an integrated circuit design, the design including geometric circuit elements for providing circuit functions of an integrated circuit. At least a portion of the integrated circuit design is exploded and geometric circuit elements of the exploded integrated circuit design are gathered into optically independent classes.
    Type: Application
    Filed: March 14, 2002
    Publication date: September 18, 2003
    Inventors: Stanislav V. Aleshin, Evgueny E. Egorov, Marina Medvedeva