Patents by Inventor Ewald John Detjens

Ewald John Detjens has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7836416
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs. Moreover, various embodiments related to HDL code coverage are described.
    Type: Grant
    Filed: April 13, 2007
    Date of Patent: November 16, 2010
    Assignee: Synopsys, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Ewald John Detjens
  • Patent number: 7222315
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs. Moreover, various embodiments related to HDL code coverage are described.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: May 22, 2007
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Ewald John Detjens
  • Publication number: 20040025122
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs. Moreover, various embodiments related to HDL code coverage are described.
    Type: Application
    Filed: February 28, 2003
    Publication date: February 5, 2004
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Ewald John Detjens