Abstract: A split bus arrangement for increasing network interface bandwidth capacity in a multipoint control unit includes a bus clock circuit for passing clock signals from a first network bus to a second network bus over a common interprocessor bus. A preferred timing arrangement provides frequency and phase lock among processor units communicating on the common interprocessor bus.

Abstract: An apparatus and method for replacing circuit boards in a live communication system having an over-the-top ribbon cable data bus configuration. The ribbon cables are segmented and redirected between individual circuit boards and a backplane data bus. Each ribbon cable connects either directly to the backplane or to an interposer board coupled between the circuit board and the backplane. Isolation circuitry either on the backplane or on the interposer board isolates clock and data signals between the backplane and a circuit board selected for replacement.