Patents by Inventor F. Gealy
F. Gealy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8673390Abstract: There is disclosed a method of forming crystalline tantalum pentoxide on a ruthenium-containing material having an oxygen-containing surface wherein the oxygen-containing surface is contacted with a treating composition, such as water, to remove at least some oxygen. Crystalline tantalum pentoxide is formed on at least a portion of the surface having reduced oxygen content.Type: GrantFiled: September 13, 2012Date of Patent: March 18, 2014Assignee: Micron Technology, Inc.Inventors: Vishwanath Bhat, Rishikesh Krishnan, Daniel F. Gealy
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Patent number: 8282988Abstract: There is disclosed a method of forming crystalline tantalum pentoxide on a ruthenium-containing material having an oxygen-containing surface wherein the oxygen-containing surface is contacted with a treating composition, such as water, to remove at least some oxygen. Crystalline tantalum pentoxide is formed on at least a portion of the surface having reduced oxygen content.Type: GrantFiled: August 16, 2011Date of Patent: October 9, 2012Assignee: Micron Technology, IncInventors: Vishwanath Bhat, Rishikesh Krishnan, Daniel F. Gealy
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Publication number: 20070252244Abstract: The invention includes ALD-type methods in which two or more different precursors are utilized with one or more reactants to form a material. In particular aspects, the precursors are hafnium and aluminum, the only reactant is ozone, and the material is hafnium oxide predominantly in a tetragonal crystalline phase.Type: ApplicationFiled: April 28, 2006Publication date: November 1, 2007Inventors: Cancheepuram Srividya, Noel Rocklein, John Vernon, Jeff Nelson, F. Gealy, David Korn
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Patent number: 7279435Abstract: A method and apparatus for preventing N2O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace are disclosed. The method and apparatus utilize a catalyst to catalytically disassociate N2O as it enters the high pressure oxidation furnace. This catalyst is used in an environment of between five (5) atmospheres to twenty-five (25) atmospheres N2O and a temperature range of 600° C. to 750° C., which are the conditions that lead to the N2O going super critical. By preventing the N2O from becoming super critical, the reaction is controlled that prevents both temperature and pressure spikes. The catalyst can be selected from the group of noble transition metals and their oxides. This group can comprise palladium, platinum, iridium, rhodium, nickel, silver, and gold.Type: GrantFiled: September 2, 2004Date of Patent: October 9, 2007Assignee: Micron Technology, Inc.Inventors: Daniel F. Gealy, Dave Chapek, Scott DeBoer, Husam N. Al-Shareef, Randhir Thakur
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Publication number: 20070166962Abstract: The invention includes methods of forming layers comprising epitaxial silicon. In one implementation, an opening is formed within a first material received over a monocrystalline material. Opposing sidewalls of the opening are lined with a second material, with monocrystalline material being exposed at a base of the second material-lined opening. A silicon-comprising layer is epitaxially grown from the exposed monocrystalline material within the second material-lined opening. At least a portion of the second material lining is in situ removed. Other aspects and implementations are contemplated.Type: ApplicationFiled: February 28, 2007Publication date: July 19, 2007Inventors: Nirmal Ramaswamy, Gurtej Sandhu, Chris Carlson, F. Gealy
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Publication number: 20070075349Abstract: The invention includes a method of depositing a noble metal. A substrate is provided. The substrate has a first region and a second region. The first and second regions are exposed to a mixture comprising a precursor of a noble metal and an oxidant. During the exposure, a layer containing the noble metal is selectively deposited onto the first region relative to the second region. In particular applications, the first region can comprise borophosphosilicate glass, and the second region can comprise either aluminum oxide or doped non-oxidized silicon. The invention also includes capacitor constructions and methods of forming capacitor constructions.Type: ApplicationFiled: October 31, 2006Publication date: April 5, 2007Inventors: Cancheepuram Srividya, F. Gealy, Thomas Graettinger
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Publication number: 20070069270Abstract: An improved charge storing device and methods for providing the same, the charge storing device comprising a conductor-insulator-conductor (CIC) sandwich. The CIC sandwich comprises a first conducting layer deposited on a semiconductor integrated circuit. The CIC sandwich further comprises a first insulating layer deposited over the first conducting layer in a flush manner. The first insulating layer comprises a structure having a plurality of oxygen cites and a plurality of oxygen atoms that partially fill the oxygen cites, wherein the unfilled oxygen cites define a concentration of oxygen vacancies.Type: ApplicationFiled: April 4, 2006Publication date: March 29, 2007Inventors: Cem Basceri, Howard Rhodes, Gurtej Sandhu, F. Gealy, Thomas Graettinger
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Publication number: 20070026601Abstract: The invention includes methods in which metal oxide dielectric materials are deposited over barrier layers. The barrier layers can comprise compositions of metal and one or more of carbon, boron and nitrogen, and the metal oxide of the dielectric material can comprise the same metal as the barrier layer. The dielectric material/barrier layer constructions can be incorporated into capacitors. The capacitors can be used in, for example, DRAM cells, which in turn can be used in electronic systems.Type: ApplicationFiled: September 6, 2006Publication date: February 1, 2007Inventors: Cem Basceri, F. Gealy, Gurtej Sandhu
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Publication number: 20060264010Abstract: The invention includes methods of forming layers comprising epitaxial silicon. In one implementation, an opening is formed within a first material received over a monocrystalline material. Opposing sidewalls of the opening are lined with a second material, with monocrystalline material being exposed at a base of the second material-lined opening. A silicon-comprising layer is epitaxially grown from the exposed monocrystalline material within the second material-lined opening. At least a portion of the second material lining is in situ removed. Other aspects and implementations are contemplated.Type: ApplicationFiled: July 31, 2006Publication date: November 23, 2006Inventors: Nirmal Ramaswamy, Gurtej Sandhu, Chris Carlson, F. Gealy
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Publication number: 20060263974Abstract: The invention includes methods of electrically interconnecting different elevation conductive structures, methods of forming capacitors, methods of forming an interconnect between a substrate bit line contact and a bit line in DRAM, and methods of forming DRAM memory cells. In one implementation, a method of electrically interconnecting different elevation conductive structures includes forming a first conductive structure comprising a first electrically conductive surface at a first elevation of a substrate. A nanowhisker is grown from the first electrically conductive surface, and is provided to be electrically conductive. Electrically insulative material is provided about the nanowhisker. An electrically conductive material is deposited over the electrically insulative material in electrical contact with the nanowhisker at a second elevation which is elevationally outward of the first elevation, and the electrically conductive material is provided into a second conductive structure.Type: ApplicationFiled: May 18, 2005Publication date: November 23, 2006Inventors: Brett Busch, David Hwang, F. Gealy
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Publication number: 20060249778Abstract: The invention includes methods of forming hafnium-containing materials, such as, for example, hafnium oxide. In one aspect, a semiconductor substrate is provided, and first reaction conditions are utilized to form hafnium-containing seed material in a desired crystalline phase and orientation over the substrate. Subsequently, second reaction conditions are utilized to grow second hafnium-containing material over the seed material. The second hafnium-containing material is in a crystalline phase and/or orientation different from the crystalline phase and orientation of the hafnium-containing seed material. The second hafnium-containing material can be, for example, in an amorphous phase. The seed material is then utilized to induce a desired crystalline phase and orientation in the second hafnium-containing material. The invention also includes capacitor constructions utilizing hafnium-containing materials, and circuit assemblies comprising the capacitor constructions.Type: ApplicationFiled: July 11, 2006Publication date: November 9, 2006Inventors: Cem Basceri, F. Gealy, Gurtej Sandhu
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Publication number: 20060252221Abstract: The invention includes methods of forming hafnium-containing materials, such as, for example, hafnium oxide. In one aspect, a semiconductor substrate is provided, and first reaction conditions are utilized to form hafnium-containing seed material in a desired crystalline phase and orientation over the substrate. Subsequently, second reaction conditions are utilized to grow second hafnium-containing material over the seed material. The second hafnium-containing material is in a crystalline phase and/or orientation different from the crystalline phase and orientation of the hafnium-containing seed material. The second hafnium-containing material can be, for example, in an amorphous phase. The seed material is then utilized to induce a desired crystalline phase and orientation in the second hafnium-containing material. The invention also includes capacitor constructions utilizing hafnium-containing materials, and circuit assemblies comprising the capacitor constructions.Type: ApplicationFiled: July 11, 2006Publication date: November 9, 2006Inventors: Cem Basceri, F. Gealy, Gurtej Sandhu
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Publication number: 20060251813Abstract: The invention includes ALD-type methods in which two or more different precursors are provided within a chamber at different and substantially non-overlapping times relative to one another to form a material, and the material is thereafter exposed to one or more reactants to change a composition of the material. In particular aspects, the precursors utilized to form the material are metal-containing precursors, and the reactant utilized to change the composition of the material comprises oxygen, silicon, and/or nitrogen.Type: ApplicationFiled: July 12, 2006Publication date: November 9, 2006Inventors: Chris Carlson, Vishwanath Bhat, F. Gealy
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Publication number: 20060234502Abstract: The present invention is generally directed to a method of forming titanium nitride layers. In one illustrative embodiment, the method includes forming a layer of titanium nitride by performing a deposition process, performing an anneal process on the layer of titanium nitride in a chlorine scavenging ambient to define an annealed layer of titanium nitride, and, prior to exposing the annealed layer of titanium nitride to an oxygen-containing ambient, forming a cap layer on the annealed layer of titanium nitride.Type: ApplicationFiled: April 13, 2005Publication date: October 19, 2006Inventors: Vishwanath Bhat, F. Gealy
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Publication number: 20060205227Abstract: The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated.Type: ApplicationFiled: April 28, 2006Publication date: September 14, 2006Inventors: Demetrius Sarigiannis, Garo Derderian, Cem Basceri, Gurtej Sandhu, F. Gealy, Chris Carlson
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Publication number: 20060205228Abstract: The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated.Type: ApplicationFiled: April 28, 2006Publication date: September 14, 2006Inventors: Demetrius Sarigiannis, Garo Derderian, Cem Basceri, Gurtej Sandhu, F. Gealy, Chris Carlson
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Publication number: 20060145294Abstract: A method of forming a capacitor includes forming a conductive metal first electrode layer over a substrate, with the conductive metal being oxidizable to a higher degree at and above an oxidation temperature as compared to any degree of oxidation below the oxidation temperature. At least one oxygen containing vapor precursor is fed to the conductive metal first electrode layer below the oxidation temperature under conditions effective to form a first portion oxide material of a capacitor dielectric region over the conductive metal first electrode layer. At least one vapor precursor is fed over the first portion at a temperature above the oxidation temperature effective to form a second portion oxide material of the capacitor dielectric region over the first portion. The oxide material of the first portion and the oxide material of the second portion are common in chemical composition. A conductive second electrode layer is formed over the second portion oxide material of the capacitor dielectric region.Type: ApplicationFiled: February 27, 2006Publication date: July 6, 2006Inventors: Vishwanath Bhat, Chris Carlson, F. Gealy
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Publication number: 20060120019Abstract: Methods of forming a capacitor are disclosed. The methods may comprise the steps of forming a substrate assembly and forming a first electrode on the substrate assembly. The first electrode may be formed to include at least one non-smooth surface and may be formed from a material selected from the group consisting of transition metals, conductive oxides, alloys thereof, and combinations thereof. The methods may also comprise the step of forming a dielectric on the first electrode and an uppermost surface of the substrate assembly, and forming a second electrode on the dielectric. The second electrode may be formed to include at least one non-smooth surface. Also, the dielectric and the second electrode may be formed only within the first electrode.Type: ApplicationFiled: January 5, 2006Publication date: June 8, 2006Inventors: F. Gealy, Thomas Graettinger
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Publication number: 20060097348Abstract: Structures having an electrode formed from a transition metal or a conductive metal oxide are disclosed. The structures may comprise a first electrode made of a material selected from the group consisting of transition metals, conductive metal-oxides, alloys thereof, and combinations thereof The first electrode may comprise a first non-smooth surface, and the first non-smooth surface may comprise a concave hemispherical grain. The structures may also comprise a dielectric in contact with the first electrode and a surface of a substrate assembly.Type: ApplicationFiled: December 22, 2005Publication date: May 11, 2006Inventors: F. Gealy, Thomas Graettinger
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Publication number: 20060046440Abstract: The invention includes methods of forming layers comprising epitaxial silicon. In one implementation, an opening is formed within a first material received over a monocrystalline material. Opposing sidewalls of the opening are lined with a second material, with monocrystalline material being exposed at a base of the second material-lined opening. A silicon-comprising layer is epitaxially grown from the exposed monocrystalline material within the second material-lined opening. At least a portion of the second material lining is in situ removed. Other aspects and implementations are contemplated.Type: ApplicationFiled: September 1, 2004Publication date: March 2, 2006Inventors: Nirmal Ramaswamy, Gurtej Sandhu, Chris Carlson, F. Gealy