Patents by Inventor F. Joel Ferguson

F. Joel Ferguson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for diagnosing bridging faults in integrated circuits
    Patent number: 6560736
    Abstract: A method for diagnosing bridging faults with inexpensively-obtained stuck-at signatures, in which only those faults determined to be realistic through inductive fault analysis are considered as candidates, match restrictions and match requirements are imposed during matching in order to minimize diagnosis size, and match ranking is applied and the matching criteria relaxed to further increase the effective precision and to increase the number of correct diagnoses. In addition, the method reduces the number of bridging fault candidates by constructing a dictionary of composite signatures of node pairs based on a ranking threshold.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: May 6, 2003
    Assignee: The Regents of the University of California
    Inventors: F. Joel Ferguson, Tracy Larabee, Brian Chess, David B. Lavo
  • Method for diagnosing bridging faults in integrated circuits
    Publication number: 20010003427
    Abstract: A method for diagnosing bridging faults with inexpensively-obtained stuck-at signatures, in which only those faults determined to be realistic through inductive fault analysis are considered as candidates, match restrictions and match requirements are imposed during matching in order to minimize diagnosis size, and match ranking is applied and the matching criteria relaxed to further increase the effective precision and to increase the number of correct diagnoses. In addition, the method reduces the number of bridging fault candidates by constructing a dictionary of composite signatures of node pairs based on a ranking threshold.
    Type: Application
    Filed: January 10, 2001
    Publication date: June 14, 2001
    Inventors: F. Joel Ferguson, Tracy Larrabee, Brian Chess, David B. Lavo
  • Method for diagnosing bridging faults in integrated circuits
    Patent number: 6202181
    Abstract: A method for diagnosing bridging faults with inexpensively-obtained stuck-at signatures, in which only those faults determined to be realistic through inductive fault analysis are considered as candidates, match restrictions and match requirements are imposed during matching in order to minimize diagnosis size, and match ranking is applied and the matching criteria relaxed to further increase the effective precision and to increase the number of correct diagnoses. In addition, the method reduces the number of bridging fault candidates by constructing a dictionary of composite signatures of node pairs based on a ranking threshold.
    Type: Grant
    Filed: November 3, 1997
    Date of Patent: March 13, 2001
    Assignee: The Regents of the University of California
    Inventors: F. Joel Ferguson, Tracy Larabee, Brian Chess, David B. Lavo