Patents by Inventor F. Matthew Rhodes
F. Matthew Rhodes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11323786Abstract: The present invention provides a general purpose controller chip that can be used for remotely monitoring and/or controlling plurality of devices that require current and/or voltage adjustment. In an embodiment, the general purpose controller chip is capable of performing multiple algorithmic functions such as monitoring current and voltage, adjusting and controlling them, switching power, performing detection algorithms, such as arc detection, LED dimming and the like, as well as communication functions. The general purpose controller chip provides a significantly higher level of integration and thereby makes the design of the devices simpler and dramatically reduces the cost of implementation, while providing ease of maintenance.Type: GrantFiled: February 8, 2017Date of Patent: May 3, 2022Inventors: Zeev Collin, F. Matthew Rhodes
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Publication number: 20170150241Abstract: The present invention provides a general purpose controller chip that can be used for remotely monitoring and/or controlling plurality of devices that require current and/or voltage adjustment. In an embodiment, the general purpose controller chip is capable of performing multiple algorithmic functions such as monitoring current and voltage, adjusting and controlling them, switching power, performing detection algorithms, such as arc detection, LED dimming and the like, as well as communication functions. The general purpose controller chip provides a significantly higher level of integration and thereby makes the design of the devices simpler and dramatically reduces the cost of implementation, while providing ease of maintenance.Type: ApplicationFiled: February 8, 2017Publication date: May 25, 2017Inventors: Zeev Collin, F. Matthew Rhodes
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Patent number: 6427210Abstract: An apparatus and method for power management of embedded electronic subsystems. A power management control circuit for managing power to an embedded subsystem includes a subsystem power node connected to a first section of the embedded electronic subsystem and a bias voltage node connected to a second section of the embedded electronic subsystem. A power switch is connected between a power supply and the subsystem power node. By separating the power subsystem node from the bias voltage node, power can be removed from the subsystem, while still providing the necessary bias voltage to the electronic static discharge (ESD) diodes. This prevents the voltages applied to the system bus by the subsystem from causing bus contention or system bus lock-ups. A power removal and restoration procedure is also disclosed.Type: GrantFiled: December 11, 2000Date of Patent: July 30, 2002Assignee: Conexant Systems, Inc.Inventors: Dongfeng Zhao, F. Matthew Rhodes
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Publication number: 20010000542Abstract: An apparatus and method for power management of embedded electronic subsystems. A power management control circuit for managing power to an embedded subsystem includes a subsystem power node connected to a first section of the embedded electronic subsystem and a bias voltage node connected to a second section of the embedded electronic subsystem. A power switch is connected between a power supply and the subsystem power node. By separating the power subsystem node from the bias voltage node, power can be removed from the subsystem, while still providing the necessary bias voltage to the electronic static discharge (ESD) diodes. This prevents the voltages applied to the system bus by the subsystem from causing bus contention or system bus lock-ups. A power removal and restoration procedure is also disclosed.Type: ApplicationFiled: December 11, 2000Publication date: April 26, 2001Applicant: Conexant Systems, Inc.Inventors: Dongfeng Zhao, F. Matthew Rhodes
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Patent number: 6163845Abstract: An apparatus and method for power management of embedded electronic subsystems. A power management control circuit for managing power to an embedded subsystem includes a subsystem power node connected to a first section of the embedded electronic subsystem and a bias voltage node connected to a second section of the embedded electronic subsystem. A power switch is connected between a power supply and the subsystem power node. By separating the power subsystem node from the bias voltage node, power can be removed from the subsystem, while still providing the necessary bias voltage to the electronic static discharge (ESD) diodes. This prevents the voltages applied to the system bus by the subsystem from causing bus contention or system bus lock-ups. A power removal and restoration procedure is also disclosed.Type: GrantFiled: October 2, 1998Date of Patent: December 19, 2000Assignee: Conexant Systems, Inc.Inventors: Dongfeng Zhao, F. Matthew Rhodes
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Patent number: 5999818Abstract: A method and apparatus for multiplexing time-shared base stations between a plurality of radio communication systems in a cellular communication system. Each radio communication system in the cellular system is assigned a limited unique set of frequencies for communication therein. Base stations in the cellular system are synchronized to a common time base and frequency reuse is achieved by time-sharing the frequencies via allocated time slots. Base stations activated to communicate in a first radio communication system and using the same frequencies that may interfere with each other are activated in the first system only during selected time intervals while same-frequency base stations nearby are deactivated in the first system. The deactivated base stations are then in turn activated in the first system while previously activated same-frequency base stations nearby are deactivated.Type: GrantFiled: August 6, 1996Date of Patent: December 7, 1999Assignee: Cirrus Logic, Inc.Inventors: Sheldon L. Gilbert, F. Matthew Rhodes, Francis James Canova, Jr.
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Patent number: 5937010Abstract: A programmable digital modulator and methods of modulating digital data for transmission by a communication system according to operating parameters selected for various applications are provided. A two-chip system is utilized by a preferred embodiment of the invention. One chip comprises a PROM for storing impulse response data which would result from filtering the data to be transmitted. The second chip comprises a data interface for accepting input data, an address generator for generating an address of the PROM where the impulse response data is stored which corresponds to the data input to the chip and for causing the PROM to output the impulse response data stored at the address generated, and a data modulator for modulating a carrier signal with the impulse response data provided by the PROM.Type: GrantFiled: August 25, 1997Date of Patent: August 10, 1999Assignee: Rockwell Semiconductor Systems, Inc.Inventors: James E. Petranovich, F. Matthew Rhodes
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Patent number: 5722040Abstract: Methods and apparatus for digital cordless telephone systems are preferably implemented in an integrated circuit chip set having one or more chips, adapted to receive a voice signal, for converting the voice signal into a digital signal of a desired form, for converting the digital signal into an analog signal and for modifying the frequency of the analog signal, for up converting during transmission the frequency of the analog signal from an intermediate frequency to a desired radio frequency and for down converting during reception from a selected radio frequency to the intermediate frequency and for amplifying the radio frequency signal during transmission and for switching the antenna between the transmit and receive paths. It is preferred for the chip set to include a base chip, an intermediate frequency chip, a radio frequency chip and an amplifier chip.Type: GrantFiled: February 4, 1993Date of Patent: February 24, 1998Assignee: Pacific Communication Sciences, Inc.Inventors: Bjorn E. Bjerede, Joseph T. Lipowski, James E. Petranovich, F. Matthew Rhodes
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Patent number: 5600678Abstract: A programmable digital modulator and methods of modulating digital data for transmission by a communication system according to operating parameters selected for various applications are provided. A two-chip system is utilized by a preferred embodiment of the invention. One chip comprises a PROM for storing impulse response data which would result from filtering the data to be transmitted. The second chip comprises a data interface for accepting input data, an address generator for generating an address of the PROM where the impulse response data is stored which corresponds to the data input to the chip and for causing the PROM to output the impulse response data stored at the address generated, and a data modulator for modulating a carrier signal with the impulse response data provided by the PROM.Type: GrantFiled: October 27, 1994Date of Patent: February 4, 1997Assignee: Pacific Communication Sciences, Inc.Inventors: James E. Petranovich, F. Matthew Rhodes
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Patent number: 5420887Abstract: A programmable digital modulator and methods of modulating digital data for transmission by a communication system according to operating parameters selected for various applications are provided. A two-chip system is utilized by a preferred embodiment of the invention. One chip comprises a PROM for storing impulse response data which would result from filtering the data to be transmitted. The second chip comprises a data interface for accepting input data, an address generator for generating an address of the PROM where the impulse response data is stored which corresponds to the data input to the chip and for causing the PROM to output the impulse response data stored at the address generated, and a data modulator for modulating a carrier signal with the impulse response data provided by the PROM.Type: GrantFiled: March 26, 1992Date of Patent: May 30, 1995Assignee: Pacific Communication SciencesInventors: F. Matthew Rhodes, James E. Petranovich
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Patent number: 4937475Abstract: A laser programmable integrated circuit chip has a plurality of logic modules organized as rows and columns. The modules and other chip components are connected by a grid-like array of conductors. The conductors are initially unattached. Customization occurs by fusing laser diffuseable links and severing cut points on the conductors. The modules have continuous conductor lines running through them. These conductor lines aid in testing and are useful in routing and error avoidance. The chip also contains test registers to test the array of logic modules, the input/output blocks, and the conductors.Type: GrantFiled: September 19, 1988Date of Patent: June 26, 1990Assignee: Massachusetts Institute of TechnologyInventors: F. Matthew Rhodes, Jack I. Raffel