Patents by Inventor Fabio Carta
Fabio Carta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11968913Abstract: A method for fabricating a semiconductor device includes forming air gaps within respective dielectric layer portions to reduce thermal cross-talk between adjacent bits. Each of the dielectric portions is formed on a substrate each adjacent to sidewall liners formed on sidewalls of a phase change memory (PCM) layer. The method further includes forming a pillar including the sidewall liners and the PCM layer, and forming a selector layer on the pillar and the dielectric portions.Type: GrantFiled: July 28, 2022Date of Patent: April 23, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Wanki Kim, Fabio Carta, Chung H. Lam, Robert L. Bruce
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Publication number: 20230189670Abstract: A memory cell with a recessed bottom electrode and methods of forming the memory cell are described. A bottom electrode can be deposited on a layer of a structure. A first insulator and a second insulator can be deposited on top of the bottom electrode. The first insulator and the second insulator can be spaced apart from one another to form an opening on top of the bottom electrode. A recess can be etched in the bottom electrode. The recess can be etched in a portion of the bottom electrode that is underneath the opening. The recess and the opening can form a pore. Phase change material can be deposited in the pore to form a memory cell.Type: ApplicationFiled: December 9, 2021Publication date: June 15, 2023Inventors: Fabio Carta, Chung Hon Lam, Wanki Kim, Robert L. Bruce
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Patent number: 11562931Abstract: A method of manufacturing a vertical metal-semiconductor field-effect transistor (MESFET) device is provided. The method includes forming a first oxide layer, forming a first electrode in the oxide layer, forming a crystallized silicon layer on the first electrode, forming a second electrode on the first oxide layer and on sidewalls of the crystalized silicon layer, forming a second oxide layer on upper surfaces of the second electrode. The method also includes forming a third electrode on an upper surface of the crystallized silicon layer.Type: GrantFiled: June 17, 2021Date of Patent: January 24, 2023Assignee: International Business Machines CorporationInventors: Fabio Carta, Matthew Joseph BrightSky
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Patent number: 11557343Abstract: According to one embodiment, a method, computer system, and computer program product for increasing linearity of a weight update of a phase change memory (PCM) cell is provided. The present invention may include applying a RESET pulse to amorphize the phase change material of the PCM cell; responsive to applying the RESET pulse, applying an incubation pulse to the PCM cell; and applying a plurality of partial SET pulses to incrementally increase the conductance of the PCM cell.Type: GrantFiled: June 22, 2021Date of Patent: January 17, 2023Assignee: International Business Machines CorporationInventors: Fabio Carta, Matthew Joseph BrightSky, Wanki Kim, Maxence Bouvier, SangBum Kim
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Publication number: 20220406843Abstract: A method of manufacturing a vertical metal-semiconductor field-effect transistor (MESFET) device is provided. The method includes forming a first oxide layer, forming a first electrode in the oxide layer, forming a crystallized silicon layer on the first electrode, forming a second electrode on the first oxide layer and on sidewalls of the crystalized silicon layer, forming a second oxide layer on upper surfaces of the second electrode. The method also includes forming a third electrode on an upper surface of the crystallized silicon layer.Type: ApplicationFiled: June 17, 2021Publication date: December 22, 2022Inventors: Fabio Carta, Matthew Joseph BrightSky
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Publication number: 20220406377Abstract: According to one embodiment, a method, computer system, and computer program product for increasing linearity of a weight update of a phase change memory (PCM) cell is provided. The present invention may include applying a RESET pulse to amorphize the phase change material of the PCM cell; responsive to applying the RESET pulse, applying an incubation pulse to the PCM cell; and applying a plurality of partial SET pulses to incrementally increase the conductance of the PCM cell.Type: ApplicationFiled: June 22, 2021Publication date: December 22, 2022Inventors: Fabio Carta, Matthew Joseph BrightSky, Wanki Kim, Maxence Bouvier, SangBum Kim
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Publication number: 20220367797Abstract: A method for fabricating a semiconductor device includes forming air gaps within respective dielectric layer portions to reduce thermal cross-talk between adjacent bits. Each of the dielectric portions is formed on a substrate each adjacent to sidewall liners formed on sidewalls of a phase change memory (PCM) layer. The method further includes forming a pillar including the sidewall liners and the PCM layer, and forming a selector layer on the pillar and the dielectric portions.Type: ApplicationFiled: July 28, 2022Publication date: November 17, 2022Inventors: Wanki Kim, Fabio Carta, Chung H. Lam, Robert L. Bruce
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Patent number: 11437571Abstract: A method for fabricating a semiconductor device includes forming air gaps within respective dielectric layer portions to reduce thermal cross-talk between adjacent bits. Each of the dielectric portions is formed on a substrate each adjacent to sidewall liners formed on sidewalls of a phase change memory (PCM) layer. The method further includes forming a pillar including the sidewall liners and the PCM layer, and forming a selector layer on the pillar and the dielectric portions.Type: GrantFiled: June 25, 2019Date of Patent: September 6, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Wanki Kim, Fabio Carta, Chung H. Lam, Robert L. Bruce
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Publication number: 20210184113Abstract: A cross-point memory semiconductor structure and a method of creating the same are provided. There is a first electrode layer on top of the substrate. A conductive oxide diffusion barrier layer is on top of the first electrode. A polycrystalline silicon diode is on top of the conductive oxide diffusion barrier. A phase change material (PCM) layer is on top of the polycrystalline silicon diode. A second electrode is on top of the PCM layer.Type: ApplicationFiled: December 17, 2019Publication date: June 17, 2021Inventors: Ning Li, Fabio Carta, Devendra K. Sadana, Tze-Chiang Chen
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Patent number: 10971546Abstract: A method of fabricating an access device in a crosspoint memory array structure during BEOL processing includes: forming at least a first doped semiconductor layer on an upper surface of a first conductive layer, the first doped semiconductor layer being in electrical connection with the first conductive layer; exposing at least a portion of the first doped semiconductor layer to a directed energy source to cause localized annealing in the first doped semiconductor layer to activate a dopant of a first conductivity type in the first doped semiconductor layer, thereby converting at least a portion of the first doped semiconductor layer into a polycrystalline layer; forming a second conductive layer over a least a portion of the first doped semiconductor layer; and etching the first doped semiconductor layer and the first and second conductive layers to form an access device that is self-aligned with the first and second conductive layers.Type: GrantFiled: August 16, 2019Date of Patent: April 6, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Fabio Carta, Matthew J. BrightSky, Bahman Hekmatshoartabari, Asit Ray, Wanki Kim
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Patent number: 10930705Abstract: A method is presented for integrating an electronic component in back end of the line (BEOL) processing. The method includes forming a first electrode over a semiconductor substrate, forming a first electrically conductive material over a portion of the first electrode, forming a second electrically conductive material over the first electrically conductive material, where the first and second electrically conductive materials define a p-n junction, depositing a phase change material over the p-n junction, and forming a second electrode over the phase change material.Type: GrantFiled: March 28, 2018Date of Patent: February 23, 2021Assignee: International Business Machines CorporationInventors: Fabio Carta, Chung H. Lam, Matthew J. BrightSky, Bahman Hekmatshoartabari
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Publication number: 20210050384Abstract: A method of fabricating an access device in a crosspoint memory array structure during BEOL processing includes: forming at least a first doped semiconductor layer on an upper surface of a first conductive layer, the first doped semiconductor layer being in electrical connection with the first conductive layer; exposing at least a portion of the first doped semiconductor layer to a directed energy source to cause localized annealing in the first doped semiconductor layer to activate a dopant of a first conductivity type in the first doped semiconductor layer, thereby converting at least a portion of the first doped semiconductor layer into a polycrystalline layer; forming a second conductive layer over a least a portion of the first doped semiconductor layer; and etching the first doped semiconductor layer and the first and second conductive layers to form an access device that is self-aligned with the first and second conductive layers.Type: ApplicationFiled: August 16, 2019Publication date: February 18, 2021Inventors: Fabio Carta, Matthew J. BrightSky, Bahman Hekmatshoartabari, Asit Ray, Wanki Kim
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Patent number: 10903270Abstract: A combined semiconductor device is fabricated by forming a first access structure from a mixed ionic electronic conduction (MIEC) material. A first side of a first memory structure is electrically coupled with a first side of the first access structure to form the combination device. A subtractive etching process is applied to the combination device such that a surface of the combination device that is substantially orthogonal to a plane of a substrate of the semiconductor device is within a defined tapering tolerance.Type: GrantFiled: December 20, 2018Date of Patent: January 26, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Robert Bruce, Fabio Carta, Gloria WingYun Fraczak, Hiroyuki Miyazoe, Kumar R. Virwani
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Patent number: 10892413Abstract: A phase change memory array and method for fabricating the same. The phase change memory array includes a plurality of bottom electrodes, top electrodes, and memory pillars. Each of the memory pillars includes phase change material surrounded by a dielectric casing. The phase change material is positioned between, and in series circuit with, a respective bottom electrode from the bottom electrodes and a respective top electrode from the top electrodes. A continuous layer of selector material is positioned between the memory pillars and the plurality of bottom electrodes. The selector material is configured to conduct electricity only when a voltage across the selector material exceeds a voltage threshold.Type: GrantFiled: January 17, 2017Date of Patent: January 12, 2021Assignee: International Business Machines CorporationInventors: Robert L. Bruce, Fabio Carta, Wanki Kim, Chung H. Lam
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Publication number: 20200411757Abstract: A method for fabricating a semiconductor device includes forming air gaps within respective dielectric layer portions to reduce thermal cross-talk between adjacent bits. Each of the dielectric portions is formed on a substrate each adjacent to sidewall liners formed on sidewalls of a phase change memory (PCM) layer. The method further includes forming a pillar including the sidewall liners and the PCM layer, and forming a selector layer on the pillar and the dielectric portions.Type: ApplicationFiled: June 25, 2019Publication date: December 31, 2020Inventors: Wanki Kim, Fabio Carta, Chung H. Lam, Robert L. Bruce
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Patent number: 10833123Abstract: A method for deactivating memory cells affected by the presence of grain boundaries in polycrystalline selection devices includes crystallizing a semiconductor layer in a diode stack to form a polycrystalline layer for selection diodes formed in a crossbar array. To achieve a crystalline state in phase change memory elements coupled to corresponding selection diodes perform an anneal. Memory cells having shunted selection diodes due to grain boundaries are identified by scanning the array using sense voltages. A second voltage larger than the sense voltages is applied to the phase change memory elements gated by the shunted selection diodes such that the phase change memory elements gated by the shunted diodes achieve a permanently high resistive state.Type: GrantFiled: January 15, 2019Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Bahman Hekmatshoartabari, Chung H. Lam, Fabio Carta, Matthew J. BrightSky
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Patent number: 10808316Abstract: A method of forming a phase change material is provided in which the crystalline state resistance of the material can be controlled through controlling the flow ratio of NH3/Ar. The method may include providing a flow modulated chemical vapor deposition apparatus. The method may further include flowing gas precursors into the flow modulated chemical vapor deposition apparatus to provide the base material components of the phase change material. The method further includes flowing a co-reactant precursor and an inert gas into the flow modulated chemical vapor deposition, wherein adjusting ratio of the co-reactant precursor to the inert gas adjusts the crystalline state resistance of the phase change material.Type: GrantFiled: May 10, 2018Date of Patent: October 20, 2020Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, ULVAC, INC.Inventors: Fabio Carta, Takeshi Masuda, Gloria W. Y. Fraczak, Robert Bruce, Norma Edith Sosa, Matthew J. BrightSky
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Publication number: 20200295083Abstract: A voltage sensitive switching device has a first electrode, a second electrode, and a switching layer between the first and second electrodes. An in situ barrier layer is disposed between the first and second electrodes. The barrier layer comprises a composition including silicon and carbon. The switching device can be used in memory devices, including 3D cross-point memory.Type: ApplicationFiled: March 15, 2019Publication date: September 17, 2020Applicants: MACRONIX INTERNATIONAL CO., LTD., INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Huai-Yu CHENG, I-Ting KUO, Hsiang-Lan LUNG, Robert L. Bruce, Fabio Carta
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Patent number: 10770656Abstract: Method(s) and apparatuses for forming a phase change memory. A method includes: forming a crystalline phase-change layer at a first position in along a surface of a first semiconductor layer, and forming an amorphous phase-change layer at a second position along the surface of a second semiconductor layer, wherein the crystalline phase-change layer and the amorphous phase-change layer are in contact.Type: GrantFiled: September 20, 2018Date of Patent: September 8, 2020Assignee: International Business Machines CorporationInventors: Gloria Wing Yun Fraczak, Matthew Brightsky, Chung Hon Lam, Fabio Carta, Robert Bruce, Takeshi Masuda, Koukou Suu
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Patent number: 10763374Abstract: A method is presented for integrating an electronic component in back end of the line (BEOL) processing. The method includes forming a first electrode over a semiconductor substrate, forming a first electrically conductive material over a portion of the first electrode, and forming a second electrically conductive material over the first electrically conductive material, where the first and second electrically conductive materials define a p-n junction. The method further includes depositing a second electrode between a set of spacers and in direct contact with the p-n-junction, depositing a phase change material over the p-n junction and in direct contact with the second electrode, and forming a third electrode over a portion of the phase change material.Type: GrantFiled: May 16, 2019Date of Patent: September 1, 2020Assignee: International Business Machines CorporationInventors: Fabio Carta, Chung H. Lam, Matthew J. BrightSky, Bahman Hekmatshoartabari