Patents by Inventor Fabio SEVERINI

Fabio SEVERINI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12665587
    Abstract: A switch device is described, formed by: a first switch MOS transistor, with its drain terminal connected to a first switch terminal, source terminal connected to an internal source node and gate terminal connected to an internal gate node; a second switch MOS transistor, with its drain terminal connected to a second switch terminal, source terminal connected to the internal source node and gate terminal connected to the internal gate node; and a voltage limiting element connected between the internal gate and source nodes. A driving stage, voltage-referred to the internal source node, drives the switching of the bidirectional switch, as a function a first and a second driving signals, and has a driving transistor and a switching transistor connected to each other in inverter configuration.
    Type: Grant
    Filed: June 11, 2024
    Date of Patent: June 23, 2026
    Assignee: STMicroelectronics International N.V.
    Inventors: Marco Zamprogno, Pasquale Flora, Fabio Severini
  • Publication number: 20240421809
    Abstract: A switch device is described, formed by: a first switch MOS transistor, with its drain terminal connected to a first switch terminal, source terminal connected to an internal source node and gate terminal connected to an internal gate node; a second switch MOS transistor, with its drain terminal connected to a second switch terminal, source terminal connected to the internal source node and gate terminal connected to the internal gate node; and a voltage limiting element connected between the internal gate and source nodes. A driving stage, voltage-referred to the internal source node, drives the switching of the bidirectional switch, as a function a first and a second driving signals, and has a driving transistor and a switching transistor connected to each other in inverter configuration.
    Type: Application
    Filed: June 11, 2024
    Publication date: December 19, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Marco ZAMPROGNO, Pasquale FLORA, Fabio SEVERINI
  • Patent number: 12135238
    Abstract: A system and method for detection, localization and signaling of single photon events and of at least two photons time coincidence events. The system includes at least one array of pixels, each of which includes a photodetector and a front-end electronics, which outputs a digital signal; at least one event detection electronics including: a plurality of digital-to-analog transducers, one for each pixel of the array, configured to convert the digital signal coming from the respective pixel in a corresponding analog signal, which is quantized in amplitude and duration; an analog adder node configured to sum the analog signals coming from the digital-to-analog transducers, obtaining a sum analog signal; and an overall analog-to-digital transducer. The system and method are ultimately configured to output a digital signal if an output signal of an analog adder node exceeds, respectively, a first threshold or the second threshold, allowing event detection, within a time window.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: November 5, 2024
    Assignee: POLITECNICO DI MILANO
    Inventors: Federica Alberta Villa, Franco Zappa, Fabio Severini, Francesca Madonini, Danilo Bronzi
  • Publication number: 20240175748
    Abstract: A system and method for detection, localization and signaling of single photon events and of at least two photons time coincidence events. The system includes at least one array of pixels, each of which includes a photodetector and a front-end electronics, which outputs a digital signal; at least one event detection electronics including: a plurality of digital-to-analog transducers, one for each pixel of the array, configured to convert the digital signal coming from the respective pixel in a corresponding analog signal, which is quantized in amplitude and duration; an analog adder node configured to sum the analog signals coming from the digital-to-analog transducers, obtaining a sum analog signal; and an overall analog-to-digital transducer. The system and method are ultimately configured to output a digital signal if an output signal of an analog adder node exceeds, respectively, a first threshold or the second threshold, allowing event detection, within a time window.
    Type: Application
    Filed: March 18, 2022
    Publication date: May 30, 2024
    Applicant: POLITECNICO DI MILANO
    Inventors: Federica Alberta VILLA, Franco ZAPPA, Fabio SEVERINI, Francesca MADONINI, Danilo BRONZI