Patents by Inventor Fabio Zurcher

Fabio Zurcher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11761706
    Abstract: A sintering furnace can include an outer shell defining an internal volume a reactive agent inlet configured to introduce a reactive agent into the internal volume; an insulation chamber within the outer shell; and a retort configured to retain an object. A method of operating a sintering furnace can include sintering a part precursor within a retort arranged within a chamber, wherein the chamber defines an intermediate volume between the retort and the chamber, wherein a sintering byproduct is oxidized within the intermediate volume.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: September 19, 2023
    Assignee: Mantle Inc.
    Inventors: Stephen T. Connor, Fabio Zurcher, Thale Smith
  • Publication number: 20230057940
    Abstract: Paste compositions for additive manufacturing and methods for the same are provided. The paste composition may include an organic vehicle, and one or more powders dispersed in the organic vehicle. The organic vehicle may include a solvent, a polymeric binder, a thixotropic additive, and a dispersant. The organic vehicle may be configured to provide the paste composition with a suitable viscosity. The organic vehicle may also be configured to provide a stable paste composition for a predetermined period of time.
    Type: Application
    Filed: July 27, 2022
    Publication date: February 23, 2023
    Applicant: MANTLE INC.
    Inventors: Fabio ZURCHER, Stephen T. CONNER, Christopher FLEMING, Mohammed Haouaoui
  • Publication number: 20230037565
    Abstract: A sintering furnace can include an outer shell defining an internal volume a reactive agent inlet configured to introduce a reactive agent into the internal volume; an insulation chamber within the outer shell; and a retort configured to retain an object. A method of operating a sintering furnace can include sintering a part precursor within a retort arranged within a chamber, wherein the chamber defines an intermediate volume between the retort and the chamber, wherein a sintering byproduct is oxidized within the intermediate volume.
    Type: Application
    Filed: October 21, 2022
    Publication date: February 9, 2023
    Inventors: Stephen T. Connor, Fabio Zurcher, Thale Smith
  • Publication number: 20220196327
    Abstract: A sintering furnace can include an outer shell defining an internal volume a reactive agent inlet configured to introduce a reactive agent into the internal volume; an insulation chamber within the outer shell; and a retort configured to retain an object. A method of operating a sintering furnace can include sintering a part precursor within a retort arranged within a chamber, wherein the chamber defines an intermediate volume between the retort and the chamber, wherein a sintering byproduct is oxidized within the intermediate volume.
    Type: Application
    Filed: March 14, 2022
    Publication date: June 23, 2022
    Inventors: Stephen T. Connor, Fabio Zurcher, Thale Smith
  • Patent number: 11306968
    Abstract: A sintering furnace can include an outer shell defining an internal volume a reactive agent inlet configured to introduce a reactive agent into the internal volume; an insulation chamber within the outer shell; and a retort configured to retain an object. A method of operating a sintering furnace can include sintering a part precursor within a retort arranged within a chamber, wherein the chamber defines an intermediate volume between the retort and the chamber, wherein a sintering byproduct is oxidized within the intermediate volume.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: April 19, 2022
    Assignee: Mantle Inc.
    Inventors: Stephen T. Connor, Fabio Zurcher, Thale Smith
  • Publication number: 20220097190
    Abstract: An assembly for controlling waste material during a hybrid subtractive and additive manufacturing process is disclosed, including a machining tool held in a holder, a shroud disposed around the machining tool, and one or more ports configured to create a negative pressure within the shroud. A method of constraining waste material during a hybrid subtractive and additive manufacturing process of a part includes adding an amount of material to a part being additively manufactured, transforming the amount of material that was added, manipulating a tool to machine a portion of the part being additively manufactured and generating a waste material, sealing a portion of the tool and covering a portion of the part with a shroud, and applying a negative pressure to create an airflow to prevent the waste material from exiting the shroud.
    Type: Application
    Filed: September 29, 2021
    Publication date: March 31, 2022
    Inventors: Stephen T. Connor, Fabio Zurcher, Brad Eaton, Matthew McKay
  • Publication number: 20210172681
    Abstract: A sintering furnace can include an outer shell defining an internal volume a reactive agent inlet configured to introduce a reactive agent into the internal volume; an insulation chamber within the outer shell; and a retort configured to retain an object. A method of operating a sintering furnace can include sintering a part precursor within a retort arranged within a chamber, wherein the chamber defines an intermediate volume between the retort and the chamber, wherein a sintering byproduct is oxidized within the intermediate volume.
    Type: Application
    Filed: December 4, 2020
    Publication date: June 10, 2021
    Inventors: Stephen T. Connor, Fabio Zurcher, Thale Smith
  • Publication number: 20170200608
    Abstract: Doped semiconductor ink formulations, methods of making doped semiconductor ink formulations, methods of coating or printing thin films, methods of forming electronic devices and/or structures from the thin films, and methods for modifying and controlling the threshold voltage of a thin film transistor using the films are disclosed. A desired dopant may be added to an ink formulation comprising a Group IVA compound and a solvent, and then the ink may be printed on a substrate to form thin films and conductive structures/devices, such as thin film transistors. By adding a customized amount of the dopant to the ink prior to printing, the threshold voltage of a thin film transistor made from the doped semiconductor ink may be independently controlled upon activation of the dopant.
    Type: Application
    Filed: March 27, 2017
    Publication date: July 13, 2017
    Inventors: Wenzhuo GUO, Fabio ZÜRCHER, Arvind KAMATH, Joerg ROCKENBERGER
  • Patent number: 9640390
    Abstract: Doped semiconductor ink formulations, methods of making doped semiconductor ink formulations, methods of coating or printing thin films, methods of forming electronic devices and/or structures from the thin films, and methods for modifying and controlling the threshold voltage of a thin film transistor using the films are disclosed. A desired dopant may be added to an ink formulation comprising a Group IVA compound and a solvent, and then the ink may be printed on a substrate to form thin films and conductive structures/devices, such as thin film transistors. By adding a customized amount of the dopant to the ink prior to printing, the threshold voltage of a thin film transistor made from the doped semiconductor ink may be independently controlled upon activation of the dopant.
    Type: Grant
    Filed: May 7, 2013
    Date of Patent: May 2, 2017
    Assignee: Thin Film Electronics ASA
    Inventors: Wenzhuo Guo, Fabio Zurcher, Arvind Kamath, Joerg Rockenberger
  • Patent number: 9196641
    Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: November 24, 2015
    Assignee: Thin Film Electronics ASA
    Inventors: Arvind Kamath, James Montague Cleeves, Joerg Rockenberger, Patrick Smith, Fabio Zurcher
  • Patent number: 8960558
    Abstract: A RF MOS- or nonlinear device-based surveillance identification tag, and methods for its manufacture and use. The tag includes an inductor, a capacitor plate coupled to the inductor, a dielectric film on the capacitor plate, a semiconductor component on the dielectric film, and a conductor providing electrical communication between the semiconductor component and the inductor. The method of manufacture includes depositing a semiconductor material/precursor on a dielectric film; forming a semiconductor component from the semiconductor material/precursor; forming a conductive structure at least partly on the semiconductor component; and etching the electrically functional substrate to form an inductor and/or a second capacitor plate. The method of use includes causing/inducing a current in the tag sufficient to generate detectable electromagnetic radiation; detecting the radiation; and selectively deactivating the tag.
    Type: Grant
    Filed: February 1, 2012
    Date of Patent: February 24, 2015
    Assignee: Thin Film Electronics ASA
    Inventors: J. Devin MacKenzie, James Montague Cleeves, Vik Pavate, Christopher Gudeman, Fabio Zurcher, Max Davis, Dan Good, Joerg Rockenberger
  • Patent number: 8900915
    Abstract: Epitaxial structures, methods of making epitaxial structures, and devices incorporating such epitaxial structures are disclosed. The methods and the structures employ a liquid-phase Group IVA semiconductor element precursor ink (e.g., including a cyclo- and/or polysilane) and have a relatively good film quality (e.g., texture, density and/or purity). The Group IVA semiconductor element precursor ink forms an epitaxial film or feature when deposited on a (poly)crystalline substrate surface and heated sufficiently for the Group IVA semiconductor precursor film or feature to adopt the (poly)crystalline structure of the substrate surface. Devices incorporating a selective emitter that includes the present epitaxial structure may exhibit improved power conversion efficiency relative to a device having a selective emitter made without such a structure due to the improved film quality and/or the perfect interface formed in regions between the epitaxial film and contacts formed on the film.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: December 2, 2014
    Assignee: Thin Film Electronics ASA
    Inventors: Joerg Rockenberger, Fabio Zürcher, Mao Takashima
  • Patent number: 8853677
    Abstract: Metal ink compositions, methods of forming such compositions, and methods of forming conductive layers are disclosed. The ink composition includes a bulk metal, a transition metal source, and an organic solvent. The transition metal source may be a transition metal capable of forming a silicide, in an amount providing from 0.01 to 50 at. % of the transition metal relative to the bulk metal. Conductive structures may be made using such ink compositions by forming a silicon-containing layer on a substrate, printing a metal ink composition on the silicon-containing layer, and curing the composition. The metal inks of the present invention have high conductivity and form low resistivity contacts with silicon, and reduce the number of inks and printing steps needed to fabricate integrated circuits.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: October 7, 2014
    Assignee: Thin Film Electronics ASA
    Inventors: Joerg Rockenberger, Yu Chen, Fabio Zürcher, Scott Haubrich
  • Patent number: 8846507
    Abstract: Compositions and methods for controlled polymerization and/or oligomerization of hydrosilanes compounds including those of the general formulae SinH2n and SinH2n+2 as well as alkyl- and arylsilanes, to produce soluble silicon polymers as a precursor to silicon films having low carbon content.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: September 30, 2014
    Assignee: Thin Film Electronics ASA
    Inventors: Dmitry Karshtedt, Joerg Rockenberger, Fabio Zurcher, Brent Ridley, Erik Scher
  • Patent number: 8840857
    Abstract: Heterocyclosilane compounds and methods for making the same. Such compounds (and/or ink compositions containing the same) are useful for printing or spin coating a doped silane film onto a substrate that can easily be converted into a doped amorphous silicon film (that may also be hydrogenated to some extent) or doped polycrystalline semiconductor film suitable for electronic devices. Thus, the present invention advantageously provides commercial qualities and quantities of doped semiconductor films from a “doped liquid silicon” composition.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: September 23, 2014
    Assignee: Thin Film Electronics ASA
    Inventors: Wenzhuo Guo, Fabio Zürcher, Joerg Rockenberger, Klaus Kunze, Vladimir K. Dioumaev, Brent Ridley, James Montague Cleeves
  • Publication number: 20140094004
    Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.
    Type: Application
    Filed: October 2, 2012
    Publication date: April 3, 2014
    Inventors: Arvind Kamath, James Montague Cleeves, Joerg Rockenberger, Patrick Smith, Fabio Zürcher
  • Patent number: 8624049
    Abstract: Dopant-group substituted (cyclo)silane compounds, liquid-phase compositions containing such compounds, and methods for making the same. Such compounds (and/or ink compositions containing the same) are useful for printing or spin coating a doped silane film onto a substrate that can easily be converted into a doped amorphous or polycrystalline silicon film suitable for electronic devices. Thus, the present invention advantageously provides commercial qualities and quantities of doped semiconductor films from a doped “liquid silicon” composition.
    Type: Grant
    Filed: January 18, 2010
    Date of Patent: January 7, 2014
    Assignee: Kovio, Inc.
    Inventors: Wenzhuo Guo, Vladimir K. Dioumaev, Brent Ridley, Fabio Zürcher, Joerg Rockenberger, James Montague Cleeves
  • Patent number: 8603426
    Abstract: A method of making hydrogenated Group IVA compounds having reduced metal-based impurities, compositions and inks including such Group IVA compounds, and methods for forming a semiconductor thin film. Thin semiconducting films prepared according to the present invention generally exhibit improved conductivity, film morphology and/or carrier mobility relative to an otherwise identical structure made by an identical process, but without the washing step. In addition, the properties of the present thin film are generally more predictable than those of films produced from similarly prepared (cyclo)silanes that have not been washed according to the present invention.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: December 10, 2013
    Assignee: Kovio, Inc.
    Inventors: Klaus Kunze, Wenzhuo Guo, Fabio Zürcher, Mao Takashima, Laila Francisco, Joerg Rockenberger, Brent Ridley
  • Publication number: 20130252407
    Abstract: Compositions and methods for controlled polymerization and/or oligomerization of hydrosilanes compounds including those of the general formulae SinH2n and SinH2n+2 as well as alkyl- and arylsilanes, to produce soluble silicon polymers as a precursor to silicon films having low carbon content.
    Type: Application
    Filed: May 17, 2013
    Publication date: September 26, 2013
    Inventors: Dmitry KARSHTEDT, Joerg ROCKENBERGER, Fabio ZURCHER, Brent RIDLEY, Erik SCHER
  • Patent number: 8461284
    Abstract: Compositions and methods for controlled polymerization and/or oligomerization of hydrosilanes compounds including those of the general formulae SinH2n and SinH2n+2 as well as alkyl- and arylsilanes, to produce soluble silicon polymers as a precursor to silicon films having low carbon content.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: June 11, 2013
    Assignee: Kovio, Inc.
    Inventors: Dmitry Karshtedt, Joerg Rockenberger, Fabio Zürcher, Brent Ridley, Erik Scher