Patents by Inventor Fabo YU

Fabo YU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10854629
    Abstract: An alternating stack of insulating layers and spacer material layers is formed over a substrate. A staircase region having stepped surfaces is formed by patterning the alternating stack. Memory opening fill structures are formed in a memory array region, and support pillar structures are formed in the staircase region. Each of the memory stack structures includes a memory film and a vertical semiconductor channel. The support pillar structures include first support pillar structures and having a first maximum lateral dimension and second support pillar structures having a second maximum lateral dimension that is less than the first maximum lateral dimension and interlaced with the first support pillar structures. The sacrificial material layers are replaced with electrically conductive layers.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: December 1, 2020
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Chun Ge, Jixin Yu, Fabo Yu, Xin Yuan Li, Yanli Zhang
  • Publication number: 20200312865
    Abstract: An alternating stack of insulating layers and spacer material layers is formed over a substrate. A staircase region having stepped surfaces is formed by patterning the alternating stack. Memory opening fill structures are formed in a memory array region, and support pillar structures are formed in the staircase region. Each of the memory stack structures includes a memory film and a vertical semiconductor channel. The support pillar structures include first support pillar structures and having a first maximum lateral dimension and second support pillar structures having a second maximum lateral dimension that is less than the first maximum lateral dimension and interlaced with the first support pillar structures. The sacrificial material layers are replaced with electrically conductive layers.
    Type: Application
    Filed: March 28, 2019
    Publication date: October 1, 2020
    Inventors: Chun Ge, Jixin Yu, Fabo Yu, Xin Yuan Li, Yanli Zhang
  • Patent number: 10074666
    Abstract: After formation of an alternating stack of insulating layers and sacrificial material layers, a memory opening can be formed through the alternating stack, which is subsequently filled with a columnar semiconductor pedestal portion and a memory stack structure. Breakage of the columnar semiconductor pedestal portion under mechanical stress can be avoided by growing a laterally protruding semiconductor portion by selective deposition of a semiconductor material after removal of the sacrificial material layers to form backside recesses. At least an outer portion of the laterally protruding semiconductor portion can be oxidized to form a tubular semiconductor oxide spacer. Electrically conductive layers can be formed in the backside recesses to provide word lines for a three-dimensional memory device.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: September 11, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Chun Ge, Yanli Zhang, Johann Alsmeier, Fabo Yu, Jixin Yu
  • Publication number: 20180197876
    Abstract: After formation of an alternating stack of insulating layers and sacrificial material layers, a memory opening can be formed through the alternating stack, which is subsequently filled with a columnar semiconductor pedestal portion and a memory stack structure. Breakage of the columnar semiconductor pedestal portion under mechanical stress can be avoided by growing a laterally protruding semiconductor portion by selective deposition of a semiconductor material after removal of the sacrificial material layers to form backside recesses. At least an outer portion of the laterally protruding semiconductor portion can be oxidized to form a tubular semiconductor oxide spacer. Electrically conductive layers can be formed in the backside recesses to provide word lines for a three-dimensional memory device.
    Type: Application
    Filed: January 9, 2017
    Publication date: July 12, 2018
    Inventors: Chun GE, Yanli ZHANG, Johann ALSMEIER, Fabo YU, Jixin YU
  • Patent number: 10014316
    Abstract: Memory openings and support openings can be formed through an alternating stack of insulating layers and sacrificial material layers. A set of dielectric layers and at least one semiconductor material layer can be sequentially deposited in each of the memory openings and the support openings. The at least one semiconductor material layer is removed from inside the support openings, while the at least one semiconductor material layer is not removed from inside the memory openings. Memory stack structures and support pillar structures are formed in the memory openings and the support openings, respectively. The sacrificial material layers are replaced with electrically conductive layers. Removal of the at least one semiconductor material layer from the support pillar structures reduces or eliminates leakage current through the support pillar structures.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: July 3, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Fabo Yu, Jayavel Pachamuthu, Jongsun Sel, Tuan Pham, Cheng-Chung Chu, Yao-Sheng Lee, Kensuke Yamaguchi, Masanori Terahara, Shuji Minagawa
  • Publication number: 20180108671
    Abstract: Memory openings and support openings can be formed through an alternating stack of insulating layers and sacrificial material layers. A set of dielectric layers and at least one semiconductor material layer can be sequentially deposited in each of the memory openings and the support openings. The at least one semiconductor material layer is removed from inside the support openings, while the at least one semiconductor material layer is not removed from inside the memory openings. Memory stack structures and support pillar structures are formed in the memory openings and the support openings, respectively. The sacrificial material layers are replaced with electrically conductive layers. Removal of the at least one semiconductor material layer from the support pillar structures reduces or eliminates leakage current through the support pillar structures.
    Type: Application
    Filed: October 18, 2016
    Publication date: April 19, 2018
    Inventors: Fabo YU, Jayavel PACHAMUTHU, Jongsun SEL, Tuan PHAM, Cheng-Chung CHU, Yao-Sheng LEE, Kensuke YAMAGUCHI, Masanori TERAHARA, Shuji MINAGAWA