Patents by Inventor Fabrice Verjus

Fabrice Verjus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9559290
    Abstract: A method for producing a piezoelectric sensor, includes the following steps: producing, on a rigid support (10), a stack of sensor layers (2, 4, 5, 12), the sensor layers including a layer of piezoelectric material (5) included between a first electrode (6, 7) and a second electrode (8, 9), the first electrode not being in contact with the second electrode, then, while the sensor layers (2, 4, 5, 12) are still held by the rigid support (10), covering the sensor layers with a polymer layer (11), then removing the stack of sensor layers from the rigid support (10), such that the sensor layers covered by the polymer layer (11) are no longer carried by the rigid support (10).
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: January 31, 2017
    Assignees: CHAMBRE DE COMMERCE ET D'INDUSTRIE DE REGION PARIS ILE DE FRANCE, BODY CAP
    Inventors: Laurie Valbin, Lionel Rousseau, Fabrice Verjus
  • Publication number: 20160172578
    Abstract: A method for producing a piezoelectric sensor, includes the following steps: producing, on a rigid support (10), a stack of sensor layers (2, 4, 5, 12), the sensor layers including a layer of piezoelectric material (5) included between a first electrode (6, 7) and a second electrode (8, 9), the first electrode not being in contact with the second electrode, then, while the sensor layers (2, 4, 5, 12) are still held by the rigid support (10), covering the sensor layers with a polymer layer (11), then removing the stack of sensor layers from the rigid support (10), such that the sensor layers covered by the polymer layer (11) are no longer carried by the rigid support (10).
    Type: Application
    Filed: May 23, 2014
    Publication date: June 16, 2016
    Inventors: Laurie VALBIN, Lionel ROUSSEAU, Fabrice VERJUS
  • Publication number: 20140130966
    Abstract: The invention relates to an electronic circuit (1) consisting of a substrate (10) having a surface on which at least one component (3) covered with a lid (22) is mounted. Said component comprises first connection means (15) to be connected to second connection means (70). In said circuit (1), at least one connection passage (50) is provided that extends through the lid in order to link the first connection means (15) to the outside of the lid, which then makes it possible to link the first means to the second connection means (70) (see FIG. 2). The invention can be used for the production of microsystems that require the encapsulation of some components.
    Type: Application
    Filed: December 8, 2011
    Publication date: May 15, 2014
    Applicant: KFM TECHNOLOGY
    Inventors: Sebastien Brault, Elisabeth Dufour-Gergam, Fabrice Verjus, Martiel Desgeorges
  • Patent number: 8397570
    Abstract: A MEMS multiaxial inertial sensor of angular and linear displacements, velocities, or accelerations has four comb drive capacitive sensing elements integrated on a planar substrate, each sensing element having an output responsive to displacement along a Z axis, and responsive to a displacement along X or Y axes. The sensing elements are located at different parts of the substrate on both sides of the X axis and the Y axis, the outputs being suitable for subsequently deriving linear and angular displacements about any of the X, Y or Z axes. Linear or angular movement is determined from combinations of the sensor signals.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: March 19, 2013
    Assignee: NXP B.V.
    Inventors: Fabrice Verjus, Archit Giridhar
  • Patent number: 8237256
    Abstract: A device substrate has a device major surface, a semiconductor element on the device major surface, and electrically conductive device connectors extending across the device major surface. An interconnection substrate has an interconnection substrate having an interconnection major surface, the interconnection substrate defining at least one sealing recess recessed from the interconnection major surface, the sealing recess being surrounded by a sealing ring. The device substrate is mounted on the interconnection substrate with the interconnection major surface facing the device major surface, the sealing ring around the semiconductor element and with the device major surface sealed against the sealing ring so that the recess forms a sealed cavity containing the semiconductor element. Electrical interconnects extend across the interconnection major surface. Interconnection bumps are provided outside the sealing ring to electrically connect the device to the interconnect substrate.
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: August 7, 2012
    Assignee: Ipdia
    Inventors: Fabrice Verjus, Jean-Marc Yan-Nou, David Chevrie, Francois LeCornec, Nicolaas J. A. Van Veen
  • Patent number: 8178901
    Abstract: An integrated circuit assembly (ICA) comprises: a digital and/or analog integrated circuit (S1) having a core with input and/or output pins and at least one power supply connection pad (PP) and one ground connection pad (GP) connected to a chosen one of the input and/or output pins and respectively connected to power supply and ground connection zones (MZ1) of a printed circuit board (PCB), and a passive integration substrate (S2) set on top of the digital and/or analog integrated circuit (S1) and comprising i) at least first and second input zones respectively connected to the ground (GP) and power supply (PP) connection pads to be fed with input ground and supply voltages, ii) input and/or output zones connected to chosen core input and/or output pins, and Ëi) a passive integrated circuit (PIC) connected to the first and second input zones and arranged to feed the substrate input and/or output zones with chosen ground and supply voltages defined from the input ground and supply voltages.
    Type: Grant
    Filed: April 26, 2006
    Date of Patent: May 15, 2012
    Assignee: ST-Ericsson SA
    Inventors: Patrice Gamand, Jean-Marc Yannou, Fabrice Verjus, Cyrille Cathelin
  • Patent number: 7960189
    Abstract: A system in package (10) has a, preferably wireless, test controller (20) for testing each die (30) after it has been mounted onto the substrate of the system in package (10), and a faulty die (30) is repaired before a next die (30) is mounted onto the substrate (15). This way, the system in package (10) can be tested during the intermediate stages of its manufacturing, thus ensuring that all dies (30) function correctly before sealing the dies in the single package. Consequently, a method for manufacturing a system in package (10) is obtained that has an improved yield compared to known manufacturing methods.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: June 14, 2011
    Assignee: NXP B.V.
    Inventors: Philippe L. L. Cauvet, Herve Fleury, Fabrice Verjus
  • Publication number: 20100308450
    Abstract: A device substrate has a device major surface, a semiconductor element on the device major surface, and electrically conductive device connectors extending across the device major surface. An interconnection substrate has an interconnection substrate having an interconnection major surface, the interconnection substrate defining at least one sealing recess recessed from the interconnection major surface, the sealing recess being surrounded by a sealing ring. The device substrate is mounted on the interconnection substrate with the interconnection major surface facing the device major surface, the sealing ring around the semiconductor element and with the device major surface sealed against the sealing ring so that the recess forms a sealed cavity containing the semiconductor element. Electrical interconnects extend across the interconnection major surface. Interconnection bumps are provided outside the sealing ring to electrically connect the device to the interconnect substrate.
    Type: Application
    Filed: February 8, 2010
    Publication date: December 9, 2010
    Inventors: Fabrice Verjus, Jean-Marc Yan-Nou, David Chevrie, Francois LeCornec, Nicolaas J.A. Van Veen
  • Publication number: 20100257933
    Abstract: A MEMS multiaxial inertial sensor of angular and linear displacements, velocities or accelerations has four comb drive capacitive sensing elements (18) integrated on a planar substrate (12), each having an output responsive to displacement along a Z axis, and responsive to a displacement along X or Y axes. The sensing elements are located at different parts of the substrate on both sides of the X axis and the Y axis, the outputs being suitable for subsequently deriving linear displacements along any of the X, Y or Z axes and angular displacements about any of the X, Y or Z axes. Fewer sensing elements are needed to sense in multiple directions, making the device more cost effective or smaller. Linear or angular movement is determined from combinations of the sensor signals.
    Type: Application
    Filed: July 15, 2008
    Publication date: October 14, 2010
    Applicant: NXP B.V.
    Inventors: Fabrice Verjus, Archit Giridhar
  • Publication number: 20090148966
    Abstract: A system in package (10) has a, preferably wireless, test controller (20) for testing each die (30) after it has bee mounted onto the substrate of the system in package (10), and a faulty die (30) is repaired before a next die (30) is mounted onto the substrate (15). This way, the system in package (10) can be tested during the intermediate stages of its manufacturing, thus ensuring that all dies (30) function correctly before sealing the dies in the single package. Consequently, a method for manufacturing a system in package (10) is obtained that has an improved yield compared to known manufacturing methods.
    Type: Application
    Filed: July 18, 2006
    Publication date: June 11, 2009
    Applicant: NXP B.V.
    Inventors: Philippe L. L. Cauvet, Herve Fleury, Fabrice Verjus
  • Publication number: 20080185614
    Abstract: An integrated circuit assembly (ICA) comprises: a digital and/or analog integrated circuit (S1) having a core with input and/or output pins and at least one power supply connection pad (PP) and one ground connection pad (GP) connected to a chosen one of the input and/or output pins and respectively connected to power supply and ground connection zones (MZ1) of a printed circuit board (PCB), and a passive integration substrate (S2) set on top of the digital and/or analog integrated circuit (S1) and comprising i) at least first and second input zones respectively connected to the ground (GP) and power supply (PP) connection pads to, be fed with input ground and supply voltages, ii) input and/or output zones connected to chosen core input and/or output pins, and Ëi) a passive integrated circuit (PIC) connected to the first and second input zones and arranged to feed the substrate input and/or output zones with chosen ground and supply voltages defined from the input ground and supply voltages.
    Type: Application
    Filed: April 26, 2006
    Publication date: August 7, 2008
    Applicant: NXP B.V.
    Inventors: Patrice Gamand, Jean-Marc Yannou, Fabrice Verjus, Cyrille Cathelin