Abstract: A device can be used for detecting failures in an illumination device having a plurality of light emitting diodes connected in series. A first circuit node, a second circuit node, and a third circuit node interface the illumination device such that a voltage supplying the plurality of light emitting diodes is applied between the first and the second circuit node and a first fraction of the supply voltage drop is provided between the third and the second circuit node. An evaluation unit is coupled to the first circuit node, the second circuit node, and the third circuit node and configured to assess whether a voltage present at the third circuit node is within a pre-defined range of tolerance about a nominal value that is defined as a second fraction of the supply voltage present between the first and the second circuit node.

Abstract: A driver circuit, in accordance with one example, includes a controllable current source operably coupled to the load and configured to sink or source a first current in accordance with a control signal. A controllable switch is responsive to an input signal, operably coupled to the current source, and configured to take over, or not, the first current in accordance with an input signal. The first current is directed as a load current through the load when the controllable switch is driven into a blocking state. The first current is directed through the controllable switch when the controllable switch is driven into a conducting state thus bypassing the load. An input signal includes a first series of pulses defining the desired load current waveform in accordance with a desired modulation scheme.

Abstract: A driver circuit, in accordance with one example, includes a controllable current source operably coupled to the load and configured to sink or source a first current in accordance with a control signal. A controllable switch is responsive to an input signal, operably coupled to the current source, and configured to take over, or not, the first current in accordance with an input signal. The first current is directed as a load current through the load when the controllable switch is driven into a blocking state. The first current is directed through the controllable switch when the controllable switch is driven into a conducting state thus bypassing the load. An input signal includes a first series of pulses defining the desired load current waveform in accordance with a desired modulation scheme.

Abstract: A semiconductor device includes a load current path operable to carry a load current from a supply terminal having a supply voltage to an output circuit node. The device further includes a voltage comparator configured to compare the supply voltage with a voltage threshold and to signal a low supply voltage when the supply voltage reaches or falls below the voltage threshold. An over-current detector is configured to compare a load current signal that represents the load current with an over-current threshold and to signal an over-current when the load current signal reaches or exceeds the over-current threshold. Furthermore, the semiconductor device includes a control logic unit that is configured to deactivate the load current flow when an over-current is signalled and to reduce the over-current threshold from a first value to a lower second value as long as the voltage comparator signals a low supply voltage.

Abstract: A semiconductor device is described that includes a switch to switch a load current path on and off according to an input signal. The device further includes an over-current detector to compare a load current with a threshold and to signal an over-current when the load current reaches or exceeds the threshold. The device further includes a control unit to set the threshold to a higher value while in a first state of operation and to a lower value while in a second state of operation, and to at least temporarily switch the switch off when an over-current is signalled, change from the first state of operation to the second state of operation when a first pre-defined time span has elapsed, and to change from the from the second state of operation to the first state when the switch is off for more than a second pre-defined time span.

Abstract: A driver circuit includes a buck converter associated with each LED chain for supplying a load current thereto. The buck converter receives an input voltage and is configured to provide a supply voltage to the associated LED chain such that the resulting load current of the LED chain matches at least approximately a predefined reference current value. The driver circuit further includes a switching converter that receives a driver supply voltage from a power supply and provides, as an output voltage, the input voltage for the buck converters. The switching converter is configured to provide an input voltage to the buck converters such that the maximum of the ratios between the input voltage and the supply voltages provided to the LED chains matches a predefined tolerance reference ratio.

Abstract: A system includes a bus system, such as a LIN bus system. A number of components are connected to the bus system. A first component of the components is configured to detect a direction of a current to detect a location of the first component in the bus system. Each of the components can have a unique address.

Abstract: A driver circuit, in accordance with one example, includes a controllable current source operably coupled to the load and configured to sink or source a first current in accordance with a control signal. A controllable switch is responsive to an input signal, operably coupled to the current source, and configured to take over, or not, the first current in accordance with an input signal. The first current is directed as a load current through the load when the controllable switch is driven into a blocking state. The first current is directed through the controllable switch when the controllable switch is driven into a conducting state thus bypassing the load. An input signal includes a first series of pulses defining the desired load current waveform in accordance with a desired modulation scheme.

Abstract: A driver circuit includes a buck converter associated with each LED chain for supplying a load current thereto. The buck converter receives an input voltage and is configured to provide a supply voltage to the associated LED chain such that the resulting load current of the LED chain matches at least approximately a predefined reference current value. The driver circuit further includes a switching converter that receives a driver supply voltage from a power supply and provides, as an output voltage, the input voltage for the buck converters. The switching converter is configured to provide an input voltage to the buck converters such that the maximum of the ratios between the input voltage and the supply voltages provided to the LED chains matches a predefined tolerance reference ratio.

Abstract: A device can be used for detecting failures in an illumination device having a plurality of light emitting diodes connected in series. A first circuit node, a second circuit node, and a third circuit node interface the illumination device such that a voltage supplying the plurality of light emitting diodes is applied between the first and the second circuit node and a first fraction of the supply voltage drop is provided between the third and the second circuit node. An evaluation unit is coupled to the first circuit node, the second circuit node, and the third circuit node and configured to assess whether a voltage present at the third circuit node is within a pre-defined range of tolerance about a nominal value that is defined as a second fraction of the supply voltage present between the first and the second circuit node.

Abstract: A method controls a power MOS transistor having a control terminal and a load path, the load path connected in series with a load between voltage supply terminals, wherein a power supply voltage between the voltage supply terminals imposes a load voltage across the load and a load path voltage across the load path of the power MOS transistor. The method includes generating a control current for the control terminal during a switching process when the power MOS transistor changes switching states. The control current is dependent on the power supply voltage and on at least one of the group consisting of the load path voltage and the load voltage.

Abstract: An apparatus for detecting failures in an illumination device includes at least two light emitting diodes connected in series. The apparatus includes a first, a second, and a third circuit node for interfacing the illumination device such that the voltage drop across at least two light emitting diodes is applied between the first and the second circuit node and a fraction of the voltage drop is applied between the second and the third circuit node. An evaluation unit is coupled to the first, the second, and the third circuit node and configured to assess whether the electric potential present at the third circuit node is within a pre-defined range of tolerance about a nominal value that is defined as a pre-defined fraction of the potential difference present between the first and the second circuit node.

Abstract: Embodiments of the invention are related to a power transistor and a method for controlling a power transistor. In one embodiment a power transistor comprises a power semiconductor body with a plurality of power transistor cells each having a control electrode and a current path. The power transistor furthermore comprises a temperature sensor formed by at least one transistor cell in the power semiconductor body whose control electrode is coupled to one electrode of the current path forming a reversed biased pn-junction.

Abstract: An apparatus for detecting failures in an illumination device includes at least two light emitting diodes connected in series. The apparatus includes a first, a second, and a third circuit node for interfacing the illumination device such that the voltage drop across at least two light emitting diodes is applied between the first and the second circuit node and a fraction of the voltage drop is applied between the second and the third circuit node. An evaluation unit is coupled to the first, the second, and the third circuit node and configured to assess whether the electric potential present at the third circuit node is within a pre-defined range of tolerance about a nominal value that is defined as a pre-defined fraction of the potential difference present between the first and the second circuit node.

Abstract: Embodiments of the invention are related to a power transistor and a method for controlling a power transistor. In one embodiment a power transistor comprises a power semiconductor body with a plurality of power transistor cells each having a control electrode and a current path. The power transistor furthermore comprises a temperature sensor formed by at least one transistor cell in the power semiconductor body whose control electrode is coupled to one electrode of the current path forming a reversed biased pn-junction.

Abstract: A circuit includes a MOS transistor having a control electrode and a control capacitance, and including a control circuit for the MOS transistor. The control circuit includes an input to supply a control signal and an output to supply a drive signal, the output being connected to the control electrode of the MOS transistor. A calibration circuit is connected to the control electrode of the MOS transistor, and generates a calibration signal dependent on the capacitance value of the control capacitance. A drive circuit generates the drive signal with an amplitude dependent on the calibration signal as determined by the control signal.

Abstract: An interface circuit includes an input terminal, a controlled current sink, a current measurement arrangement, and a logic circuit. The input terminal is configured to receive an input signal. The controlled current sink is operably coupled to the input terminal, and is operable to controllably take up a current from the input terminal according to a transmission signal. The current measurement arrangement is configured to generate a current measurement signal based on the current taken up by the current sink. The logic circuit is operably coupled to receive the current measurement signal and the input signal, and is configured to generate a signal depending on the input signal.

Abstract: A circuit includes a MOS transistor having a control electrode and a control capacitance, and including a control circuit for the MOS transistor. The control circuit includes an input to supply a control signal and an output to supply a drive signal, the output being connected to the control electrode of the MOS transistor. A calibration circuit is connected to the control electrode of the MOS transistor, and generates a calibration signal dependent on the capacitance value of the control capacitance. A drive circuit generates the drive signal with an amplitude dependent on the calibration signal as determined by the control signal.

Abstract: An interface circuit includes an input terminal, a controlled current sink, a current measurement arrangement, and a logic circuit. The input terminal is configured to receive an input signal. The controlled current sink is operably coupled to the input terminal, and is operable to controllably take up a current from the input terminal according to a transmission signal. The current measurement arrangement is configured to generate a current measurement signal based on the current taken up by the current sink. The logic circuit is operably coupled to receive the current measurement signal and the input signal, and is configured to generate a signal depending on the input signal.

Abstract: A method controls a power MOS transistor having a control terminal and a load path, the load path connected in series with a load between voltage supply terminals, wherein a power supply voltage between the voltage supply terminals imposes a load voltage across the load and a load path voltage across the load path of the power MOS transistor. The method includes generating a control current for the control terminal during a switching process when the power MOS transistor changes switching states. The control current is dependent on the power supply voltage and on at least one of the group consisting of the load path voltage and the load voltage.