Patents by Inventor Fabrizio Pollara

Fabrizio Pollara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8086943
    Abstract: Serial concatenated trellis coded modulation (SCTCM) includes an outer coder, an interleaver, a recursive inner coder and a mapping element. The outer coder receives data to be coded and produces outer coded data. The interleaver permutes the outer coded data to produce interleaved data. The recursive inner coder codes the interleaved data to produce inner coded data. The mapping element maps the inner coded data to a symbol. The recursive inner coder has a structure which facilitates iterative decoding of the symbols at a decoder system. The recursive inner coder and the mapping element are selected to maximize the effective free Euclidean distance of a trellis coded modulator formed from the recursive inner coder and the mapping element. The decoder system includes a demodulation unit, an inner SISO (soft-input soft-output) decoder, a deinterleaver, an outer SISO decoder, and an interleaver.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: December 27, 2011
    Assignee: California Institute of Technology
    Inventors: Dariush Divsalar, Samuel J. Dolinar, Fabrizio Pollara
  • Publication number: 20100299581
    Abstract: Serial concatenated trellis coded modulation (SCTCM) includes an outer coder, an interleaver, a recursive inner coder and a mapping element. The outer coder receives data to be coded and produces outer coded data. The interleaver permutes the outer coded data to produce interleaved data. The recursive inner coder codes the interleaved data to produce inner coded data. The mapping element maps the inner coded data to a symbol. The recursive inner coder has a structure which facilitates iterative decoding of the symbols at a decoder system. The recursive inner coder and the mapping element are selected to maximize the effective free Euclidean distance of a trellis coded modulator formed from the recursive inner coder and the mapping element. The decoder system includes a demodulation unit, an inner SISO (soft-input soft-output) decoder, a deinterleaver, an outer SISO decoder, and an interleaver.
    Type: Application
    Filed: August 2, 2010
    Publication date: November 25, 2010
    Inventors: Dariush Divsalar, Sam Dolinar, Fabrizio Pollara
  • Patent number: 7770093
    Abstract: Serial concatenated trellis coded modulation (SCTCM) includes an outer coder, an interleaver, a recursive inner coder and a mapping element. The outer coder receives data to be coded and produces outer coded data. The interleaver permutes the outer coded data to produce interleaved data. The recursive inner coder codes the interleaved data to produce inner coded data. The mapping element maps the inner coded data to a symbol. The recursive inner coder has a structure which facilitates iterative decoding of the symbols at a decoder system. The recursive inner coder and the mapping element are selected to maximize the effective free Euclidean distance of a trellis coded modulator formed from the recursive inner coder and the mapping element. The decoder system includes a demodulation unit, an inner SISO (soft-input soft-output) decoder, a deinterleaver, an outer SISO decoder, and an interleaver.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: August 3, 2010
    Inventors: Dariush Divsalar, Samuel J. Dolinar, Fabrizio Pollara
  • Patent number: 7716552
    Abstract: A turbo-like code is formed by repeating the signal, coding it, and interleaving it. A serial concatenated coder is formed of an inner coder and an outer coder separated by an interleaver. The outer coder is a coder which has rate greater than one e.g. a repetition coder. The interleaver rearranges the bits. An outer coder is a rate one coder.
    Type: Grant
    Filed: May 5, 2006
    Date of Patent: May 11, 2010
    Assignee: California Institute of Technology
    Inventors: Dariush Divsalar, Robert J. McEliece, Hui Jin, Fabrizio Pollara
  • Patent number: 7243294
    Abstract: A coding system uses a serially concatenated coder driving an interleaver, which drives a trellis coder. This combination, while similar to a turbo coder, produces certain different characteristics.
    Type: Grant
    Filed: January 11, 2001
    Date of Patent: July 10, 2007
    Assignee: California Institute of Technology
    Inventors: Dariush Divsalar, Sam Dolinar, Fabrizio Pollara
  • Publication number: 20070130494
    Abstract: Serial concatenated trellis coded modulation (SCTCM) includes an outer coder, an interleaver, a recursive inner coder and a mapping element. The outer coder receives data to be coded and produces outer coded data. The interleaver permutes the outer coded data to produce interleaved data. The recursive inner coder codes the interleaved data to produce inner coded data. The mapping element maps the inner coded data to a symbol. The recursive inner coder has a structure which facilitates iterative decoding of the symbols at a decoder system. The recursive inner coder and the mapping element are selected to maximize the effective free Euclidean distance of a trellis coded modulator formed from the recursive inner coder and the mapping element. The decoder system includes a demodulation unit, an inner SISO (soft-input soft-output) decoder, a deinterleaver, an outer SISO decoder, and an interleaver.
    Type: Application
    Filed: August 31, 2006
    Publication date: June 7, 2007
    Inventors: Dariush Divsalar, Sam Dolinar, Fabrizio Pollara
  • Publication number: 20060218460
    Abstract: A turbo-like code is formed by repeating the signal, coding it, and interleaving it. A serial concatenated coder is formed of an inner coder and an outer coder separated by an interleaver. The outer coder is a coder which has rate greater than one e.g. a repetition coder. The interleaver rearranges the bits. An outer coder is a rate one coder.
    Type: Application
    Filed: May 5, 2006
    Publication date: September 28, 2006
    Inventors: Dariush Divsalar, Robert McEliece, Hui Jin, Fabrizio Pollara
  • Patent number: 7089477
    Abstract: A turbo-like code is formed by repeating the signal, coding it, and interleaving it. A serial concatenated coder is formed of an inner coder and an outer coder separated by an interleaver. The outer coder is a coder which has rate greater than one e.g. a repetition coder. The interleaver rearranges the bits. An outer coder is a rate one coder.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: August 8, 2006
    Assignee: California Institute of Technology
    Inventors: Dariush Divsalar, Robert J. McEliece, Hui Jin, Fabrizio Pollara
  • Patent number: 4868830
    Abstract: A method and a structure to implement maximum-likelihood decoding of convolutional codes on a network of microprocessors interconnected as an n-dimensional cube (hypercube). By proper reordering of states in the decoder, only communication between adjacent processors is required. Communication time is limited to that required for communication only of the accumulated metrics and not the survivor parameters of a Viterbi decoding algorithm. The survivor parameters are stored at a local processor's memory and a trace-back method is employed to ascertain the decoding result. Faster and more efficient operation is enabled, and decoding of large constraint length codes is feasible using standard VLSI technology.
    Type: Grant
    Filed: August 18, 1987
    Date of Patent: September 19, 1989
    Assignee: California Institute of Technology
    Inventor: Fabrizio Pollara-Bozzola
  • Patent number: 4730322
    Abstract: A method and a structure to implement maximum-likelihood decoding of convolutional codes on a network of microprocessors interconnected as an n-dimensional cube (hypercube). By proper reordering of states in the decoder, only communication between adjacent processors is required. Faster and more efficient operation is enabled, and decoding of large constraint length codes is feasible using standard VLSI technology.
    Type: Grant
    Filed: September 27, 1985
    Date of Patent: March 8, 1988
    Assignee: California Institute of Technology
    Inventor: Fabrizio Pollara-Bozzola