Patents by Inventor Fabrizio Stefani
Fabrizio Stefani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6222414Abstract: An output power stage which includes a PNP pull-up transistor and an n-channel FET push-down transistor, driven in phase opposition. This fully complementary stage provides an outstandingly improved power handling capability per semiconductor area occupied, together with a large output voltage swing, but does not require the use of externally connected discrete boot-strap components. The bipolar pull-up transistor can optionally be driven through an FET auxiliary stage, to minimize the power requirements of the preceding signal amplification stage.Type: GrantFiled: December 7, 1994Date of Patent: April 24, 2001Assignee: SGS-Thomson Microelectronics S.r.l.Inventors: Carlo Cini, Fabrizio Stefani
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Patent number: 6160416Abstract: An output buffer circuit including an input node, an output stage, an output node that is connected to the output stage, and a control circuit that controls voltage variations during the rising and falling edges of the output signal. The control circuit compares the levels of the input signal and the output signal and drives the output stage. In a preferred embodiment, the control circuit includes first and second logic circuits that are each connected to the input and output nodes. The first logic circuit selectively enables operation of a first driving circuit, and the second logic circuit selectively enables operation of a second driving circuit. Additionally, a method for slew rate control during rising and falling edges of an output signal of an output buffer circuit is provided. According to the method, the level of the output signal and the level of the input signal are compared. If the input and output signals have different levels, a current is injected into or taken from the output node.Type: GrantFiled: December 4, 1998Date of Patent: December 12, 2000Assignee: STMicroelectronics S.r.l.Inventors: Francesco Adduci, Fabrizio Stefani
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Patent number: 5801536Abstract: A method of checking an integrity of an electric power connection between a contact pad of an integrated circuit and a corresponding contact pin in an electronic power device, wherein the electronic power device includes at least one final power stage powered from the respective discrete contact pad connected by means of the electric power connection to the respective contact pin. The method of checking is accomplished by providing a resistive connection between two contact pads of the electronic power device bringing the at least one final power stage, powered from the first contact pad, to a conduction state, measuring the potential difference between the two contact pins connected to the two contact pads, and comparing the potential difference with a predetermined nominal potential difference.Type: GrantFiled: December 19, 1995Date of Patent: September 1, 1998Assignee: SGS-Thomson Microelectronics S.r.l.Inventors: Davide Brambilla, Giovanni Capodivacca, Fabrizio Stefani
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Patent number: 5568342Abstract: Circuit for protection of an amplifier stage comprising circuit switching means for turn-off of the stage and piloted through a logic gate OR by a monostable, which generates upon arise of abnormal operating conditions turn-off command signals having a predetermined duration.A sensing circuit upon persistence of abnormal conditions at start-up or during normal operation also sends turn-off signals through the logic gate OR after enablement through a gate AND.The signals of any enablement at the logic gate AND arrive through a logic gate OR from a window comparator coupled with stage start-up members, from the monostable, and from the output of said logic gate AND as a confirmation signal.Type: GrantFiled: December 29, 1994Date of Patent: October 22, 1996Assignee: SGS-Thomson Microelectronics S.r.l.Inventors: Claudio Tavazzani, Andrea Fassina, Fabrizio Stefani
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Patent number: 5204638Abstract: Intrinsic offset recovery circuit particularly for amplifiers, which comprises an input differential amplifier constituted by a first PNP transistor, by a second PNP transistor, by a third NPN transistor, by a fourth NPN transistor and by a first constant-current source, and a unitary-gain output stage. The recovery circuit furthermore comprises, as connection between the input differential amplifier and the unitary-gain output stage, a gain stage which comprises a fifth NPN transistor which is connected to the output of the input differential amplifier and is connected to a sixth NPN transistor and to a seventh PNP transistor. The seventh transistor is connected to the sixth transistor. The seventh transistor and the sixth transistor are connected to the unitary-gain output stage.Type: GrantFiled: December 17, 1991Date of Patent: April 20, 1993Assignee: SGS-Thomson Microelectronics S.r.l.Inventors: Davide Brambilla, Fabrizio Stefani
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Patent number: 5107389Abstract: A circuit for limiting temperature without distortion in audio power amplifiers, comprising a temperature sensor for sensing the temperature in an audio power amplifier, and a variable-gain amplifier connected ahead of the audio power amplifier circuit and having a gain control input connected to the temperature sensor to vary the input signal of the audio amplifier in a linear manner. A linear limitation of the power, and therefore of the temperature, is thus obtained in the audio amplifier without introducing distortion.Type: GrantFiled: May 15, 1990Date of Patent: April 21, 1992Assignee: SGS-Thomson Microelectronics S.r.l.Inventors: Edoardo Botti, Fabrizio Stefani
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Patent number: 5068620Abstract: A circuit for sensing the output distortion of amplifier stages of the type which has a first input which receives a voltage signal to be amplified, a second input connected to a feedback network and an output which generates an amplified output signal. The circuit comprises at least one comparator, which receives in input a first signal which is correlated to the voltage signal and a second signal which is correlated to the output signal of the amplifier stage, and is enabled so as to generate a distortion signal in output when the second signal exceeds the first one in terms of absolute value, i.e. in the presence of distortion.Type: GrantFiled: November 1, 1990Date of Patent: November 26, 1991Assignee: SGS-Thomson Mocroelectronics S.r.l.Inventors: Edoardo Botti, Fabrizio Stefani, Daniela Nebuloni
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Patent number: 4916408Abstract: An improved power stage with increased output dynamics. The stage comprises a power amplifier having a first inverting input, a second non-inverting input, an output to be connected to a load and a feedback network comprising a first resistor connected between the inverting input and the output of the power amplifier and a second resistor connected between the first inverting input and a first line set to a first reference voltage by means of a voltage generator with preset values. The stage furthermore comprises an input voltage generator generating an input voltage signal to be amplified and connected between the second non-inverting input and a second line set to a second reference voltage different from said first reference voltage.Type: GrantFiled: November 28, 1988Date of Patent: April 10, 1990Assignee: SGS-Thomson Microelectronics S.r.l.Inventors: Fabrizio Stefani, Alberto Gola, Gianluigi Pessina
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Patent number: 4888563Abstract: An audio amplifier having a low-noise input stage, being of a type which comprises a gain stage and an output stage cascade connected downstream from said input stage which includes first and second transistors having their respective bases connected to each other via corresponding input resistors, with the base of the first transistor also adapted to constitute a signal input for the amplifier, further comprises an electric connection between the collector of said second transistor and said input resistors to define a diode configuration for that second transistor, thereby the offset effect of the input resistors can be compensated for, and the noise voltage at the output from the amplifier downed.Type: GrantFiled: December 12, 1988Date of Patent: December 19, 1989Assignee: SGS-Thomas Microelectronics S.r.L.Inventor: Fabrizio Stefani
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Patent number: 4878032Abstract: This amplifier stage has saturation control and high dynamics. The stage comprises a pair of input current sources connected in series between a pair of reference voltage lines, a pair of output transistors, connected between the pair of reference voltage lines and defining an intermediate output terminal and a driving circuit comprising active elements and interposed between the input current sources and the output transistors.Type: GrantFiled: April 12, 1988Date of Patent: October 31, 1989Assignee: S-Thomson Microelectronics S.p.A.Inventors: Edoardo Botti, Aldo Torazzina, Fabrizio Stefani
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Patent number: 4849713Abstract: In an amplifier stage comprising a pair of input current sources, connected in series between a pair of reference potential lines, a pair of output transistors connected between the pair of reference potential lines and defining an intermediate output terminal of the amplifier, a driving circuit comprising active elements and interposed between the input current source and the output transistors, and at least one saturation control circuit comprising at least one control transistor connected with its base to the driving circuit and with its collector and emitter between the output of the amplifier stage and the intermediate point between the input current sources, to detect distortion due to clipping, at least one distribution detection transistor is provided, connected to the control transistor so as to detect the current flowing through the latter, which current is related to the imbalance of the input current sources and therefore to the distortion generated in the stage.Type: GrantFiled: June 6, 1988Date of Patent: July 18, 1989Assignee: SGS-Thomson Microelectronics S.p.a.Inventors: Edoardo Botti, Fabrizio Stefani
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Patent number: 4717887Abstract: Differential amplifier stage, having circuit elements for setting the gain to zero, includes a first transistor and a second transistor, whose bases are respectively connected to the positive terminal of a voltage source by a first current generator and a second current generator and are also respectively connected to the emitters of a third and a fourth transistor via a first and a second diode. The emitters of the first and second transistors are both coupled to the negative terminal of the voltage source by means of a third current generator. The collectors of the third and fourth transistors are connected to the negative terminal of the voltage source. The base terminals of the third and fourth transistors respectivlely form first and second input terminals. On the other hand, the collector terminals of the first and second transistors form first and second output terminals.Type: GrantFiled: October 8, 1986Date of Patent: January 5, 1988Assignee: SGS Microelettronica SpAInventors: Fabrizio Stefani, Edoardo Botti
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Patent number: 4714898Abstract: A device is disclosed for protecting against shorts the transistors of the push-pull stage in a power amplifier operating on a low voltage supply, in particular for car radio sets. The device comprises sensors which are responsive to currents flowing through the two transistors which form the amplifier push-pull stage, and current-to-voltage converters which convert the sensed currents into corresponding respective voltage signals. The latter are compared in respective voltage-comparing circuits with a reference voltage indicative of the highest admissible current through either of the transistors while the other is shorted. The device also comprises two additional voltage comparators wherein the voltage applied to the load, which may be of a resistive or a reactive type, is compared with a set reference voltage which is lower than or in the extreme equal to, in absolute value, the voltage supply to the amplifier push-pull stage.Type: GrantFiled: June 6, 1986Date of Patent: December 22, 1987Assignee: SGS Microelettronica S.p.A.Inventors: Edoardo Botti, Fabrizio Stefani
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Patent number: 4682197Abstract: This integrated semiconductor device aims at drastic reduction of the direct secondary breakdown phenomena and has a plurality of side-by-side elementary transistors forming an interdigited structure. To reduce the thermal interaction between the elementary transistors, the latter are spaced apart from one another by a distance approximately equal to the width of one elementary transistor and are driven by current sources. Spacing apart reduces electrothermal interaction. Further, in order to minimize the device area requirements, the space between any two adjacent elementary transistors is made to accommodate drive transistors operating as current sources, or the elementary transistors of the complementary stage where the device forms a class B output stage, the two output transistors whereof are alternatively switched on.Type: GrantFiled: December 23, 1985Date of Patent: July 21, 1987Assignee: SGS Microelettronica S.p.A.Inventors: Flavio Villa, Bruno Murari, Franco Bertotti, Aldo Torazzina, Fabrizio Stefani
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Patent number: 4636713Abstract: A monolithically integratable control circuit for switching inductive loads, comprising a Darlington-type final stage, is described. The base of the Darlington control transistor is coupled to the collector of a transistor for extracting charge, the transistor conducting in phase opposition to the Darlington control transistor. The emitter of the transistor for extracting charge is coupled to the negative supply terminal and to the output terminal of the final stage, via a first and a second diode respectively.Type: GrantFiled: December 20, 1984Date of Patent: January 13, 1987Assignee: SGS-ATES Componenti Elettronici S.p.A.Inventor: Fabrizio Stefani
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Patent number: 4612452Abstract: A control circuit for the switching of inductive loads which is monolithically integratable and includes an output stage having push-pull transistors. The base of each transistor of the output stage is connected to a driver circuit and to an auxiliary transistor which is biased in saturation. Each auxiliary transistor is driven to conduction in phase opposition with respect to the final transistor to which it is connected. The auxiliary transistor accelerates the turn-off of the final transistor, withdrawing the base charge, while delaying the turn-on thereof and absorbing the current fed thereto for a period of time equal to that of its own turn-off transient; in this way, the simultaneous conduction of the transistors of the final stage during the switching thereof can be avoided.Type: GrantFiled: March 17, 1983Date of Patent: September 16, 1986Assignee: SGS-ATES Componenti Elettronici SpAInventors: Fabrizio Stefani, Carlo Cini, Angelo Alzati
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Patent number: 4553046Abstract: A bistable multivibrator circuit includes two main transistors and two other transistors and an additional pair of transistors. The multivibrator circuit can be monolithically integrated and has an output that can be placed in a preferential state. The two other transistors are utilized to set and reset the multivibrator circuit while the two additional transistors form a control circuit for controlling the multivibrator circuit so as to cause its outputs to be in a prescribed preferential state.Type: GrantFiled: May 26, 1983Date of Patent: November 12, 1985Assignee: SGS-ATES Componenti Elettronici SpAInventors: Angelo Alzati, Claudio Diazzi, Fabrizio Stefani
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Patent number: 4549095Abstract: A control circuit for switching inductive loads which can be monolithically integrated and used in high-speed printing equipment and in chopper power supply systems. The circuit includes a final power transistor, driven for switching by means of a drive transistor coupled to its control terminal. A speedup circuit is connected to the control terminals of both of the transistors in order to accelerate the turning off of the transistors by reducing the discharge time thereof. Such a speedup circuit is enabled so as to remove charge carriers only for a period of time which begins when the transistors are turned off in order to avoid additional time delays when the transistors are subsequently turned on again.Type: GrantFiled: November 15, 1982Date of Patent: October 22, 1985Assignee: SGS-Ates Componenti Elettronici S.p.A.Inventors: Fabrizio Stefani, Carlo Cini, Claudio Diazzi