Abstract: An apparatus includes a translation lookaside buffer (TLB). The TLB includes at least one entry that includes an entry virtual address and an entry page size indication corresponding to an entry page. The apparatus also includes input logic configured to receive an input page size indication and an input virtual address corresponding to an input page. The apparatus further includes overlap checking logic configured to determine, based at least in part on the entry page size indication and the input page size indication, whether the input page overlaps the entry page.

Abstract: Methods, apparatuses, systems, and computer-readable mediums for modeling output delay of a clocked storage element(s) are disclosed. An output delay model is employed that includes variations in the output delays for the clocked storage element over an operating range of the clocked storage element, including during transitions from transparent operation to non-transparent operation, and vice versa. Errors in the model output delay are reduced or avoided as a result. In one embodiment, the model output delay is determined for the clocked storage element as a function of the differential timing between the arrival time of a clock signal and input data to the clocked storage element. The differential timing allows determination of a model output delay from a plurality of model output delays representing a model output delay curve for the clocked storage element. Time borrowing can also be modeled automatically without the need for a second output delay model.

Abstract: An apparatus includes a translation lookaside buffer (TLB). The TLB includes at least one entry that includes an entry virtual address and an entry page size indication corresponding to an entry page. The apparatus also includes input logic configured to receive an input page size indication and an input virtual address corresponding to an input page. The apparatus further includes overlap checking logic configured to determine, based at least in part on the entry page size indication and the input page size indication, whether the input page overlaps the entry page.

Abstract: Methods, apparatuses, systems, and computer-readable mediums for modeling output delay of a clocked storage element(s) are disclosed. An output delay model is employed that includes variations in the output delays for the clocked storage element over an operating range of the clocked storage element, including during transitions from transparent operation to non-transparent operation, and vice versa. Errors in the model output delay are reduced or avoided as a result. In one embodiment, the model output delay is determined for the clocked storage element as a function of the differential timing between the arrival time of a clock signal and input data to the clocked storage element. The differential timing allows determination of a model output delay from a plurality of model output delays representing a model output delay curve for the clocked storage element. Time borrowing can also be modeled automatically without the need for a second output delay model.