Abstract: The scanning of an operating integrated circuit (IC) substrate by an electron (e)-beam is detected by providing conductive plates in the substrate, and triggering a charge-sensitive mechanism such as a field effect transistor (FET) when an e-beam has scanned over the plate. The plates can be fabricated at different levels within the substrate, with a lower plate preferably shaded from the e-beam by an upper plate and providing a reference for the upper plate. E-beam detection occurs either through the positive or negative charging of capacitances associated with the FETs, or from instantaneous negative or positive current flows from the detector plates; a latch is actuated to hold an instantaneously detected current level exceeding a predetermined threshold. The logic state of this latch can be used to modify the functional operation of the IC in real time.

Abstract: A set/scan test capability is provided for a circuit that includes sensitive subcircuits, but that can be latched out to prevent reverse engineering the sensitive elements. A mechanism to inhibit set/scan test access to at least some of the sensitive subcircuits is selectively actuated by a control circuit to override a normal set/scan test and inhibit set/scan access to the sensitive subcircuits. Various implementations are possible, such as fusible-link PROMs for irreversibly inhibiting set/scan access to the sensitive subcircuits after an initial non-inhibited test period, the use of encryption codes to enable repeated set/scan access to the sensitive subcircuits, and an erasable/reprogrammable mechanism for inhibiting set/scan access to programmed sets of subcircuits.

Abstract: A security system and method for IC circuits has at least one additional circuit element that does not contribute toward the IC's circuit function, but inhibits proper functioning of the IC in case of an attempted copying or other unauthorized use. The identity of the additional circuit elements is disguised by forming them with the visible appearance of an apparent element but with a physical modification which is not readily visible but causes them to function in a different manner, by providing different ICs with unique control codes, or both. Physical modifications not readily visible to a copyist include very narrow open circuit cuts in metallized connection lines, preferably with a focused ion beam (FIB) or laser beam; and/or disordering the lattice structure or changing the doping level of a semiconductor region, preferably with a FIB; and/or injecting electrical charge into a semiconductor region, preferably with an electron beam.

Abstract: The specification describes a process for fabricating semiconductor devices and circuits in which lateral geometry dimensions determining the performance level of the device or circuit are extremely small. In this process electron beam microfabrication techniques are used to define these extremely small dimensions. The complete fabrication process uses standard photolithography for the definition of some of the device geometry and mask patterns, and partitioning of pattern definition between electron beam microfabrication and standard photolithography is utilized according to pattern resolution requirements, and is optimized for the highest yield-throughout product.