Patents by Inventor Falk Hohnel

Falk Hohnel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Option for independently adjusting the timing of the forward and reverse direction of bi-directional digital signals
    Patent number: 7064590
    Abstract: It is difficult to optimize the timing of the forward and reverse direction for high frequency bi-directional digital signals. Therefore, a digital system is provided that improves the adjustability of the timing by the emission of an additional clock pulse, together with the output clock pulse for the receiver and the feedback clock pulse for the PLL. The additional clock pulse is re-circulated using a delay line and is used to set the clock pulse of the reverse direction signals.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: June 20, 2006
    Assignee: Siemens Aktiengesellschaft
    Inventor: Falk Höhnel
  • Timing of and minimizing external influences on digital signals
    Patent number: 6956424
    Abstract: The performance of digital signals depends to a great extent on the frequency. However, the higher the frequency, the shorter the remaining time, in which digital signals can be reliably received by a receiver from a driver via a printed conductor. The run time of the clock pulse and signals must be optimized in such a way that no timing losses occur at any location, even in the extreme environmental conditions. The invention improves the timing and minimizes external influences by coupling the output signals to an internal PLL clock pulse.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: October 18, 2005
    Assignee: Siemens Aktiengesellschaft
    Inventor: Falk Höhnel
  • Timing of and minimising external influences on digital signals
    Publication number: 20040232958
    Abstract: The performance of digital signals depends to a great extent on the frequency. However, the higher the frequency, the shorter the remaining time, in which digital signals can be reliably received by a receiver from a driver via a printed conductor. The run time of the clock pulse and signals must be optimized in such a way that no timing losses occur at any location, even in the extreme environmental conditions. The invention improves the timing and minimizes external influences by coupling the output signals to an internal PLL clock pulse.
    Type: Application
    Filed: March 5, 2004
    Publication date: November 25, 2004
    Inventor: Falk Hohnel
  • Option for independently adjusting the timing of the forward and reverse direction of bi-directional digital signals
    Publication number: 20040232959
    Abstract: It is difficult to optimize the timing of the forward and reverse direction for high frequency bidirectional digital signals. The invention improves the adjustability of the timing by the emission of an additional clock pulse, together with the output clock pulse for the receiver and the feedback clock pulse for the PLL. Said additional clock pulse is re-circulated using a delay line and is used to set the clock pulse of the reverse direction signals.
    Type: Application
    Filed: March 5, 2004
    Publication date: November 25, 2004
    Inventor: Falk Hohnel