Patents by Inventor Fan-Chi LIN

Fan-Chi LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DETECTION METHOD OF EUV PELLICLE STATUS
    Publication number: 20230393489
    Abstract: A method includes transferring an inner pod of a carrier out from an outer pod of the carrier into a lithography exposure apparatus, the inner pod containing a reticle including a reflective multilayer and a pellicle underlying the reflective multilayer; detecting a condition of the pellicle using a metrology device positioned on a base plate of the inner pod during transferring the inner pod in the lithography exposure apparatus; determining whether the condition of the pellicle is acceptable; issuing a warning when the condition of the pellicle is not acceptable.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 7, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Hao LIU, Shao-Hua WANG, Zheng-Hao ZHANG, Fan-Chi LIN, Chueh-Chi KUO, Li-Jui CHEN, Heng-Hsin LIU
  • SEMICONDUCTOR PROCESSING METHOD AND APPARATUS
    Publication number: 20230386884
    Abstract: A method includes: positioning a wafer on an electrostatic chuck of an apparatus; and securing the wafer to the electrostatic chuck by: securing a first wafer region of the wafer to a first chuck region of the electrostatic chuck by applying a first voltage at a first time. The method further includes securing a second wafer region of the wafer to a second chuck region of the electrostatic chuck by applying a second voltage at a second time different from the first time; and processing the wafer by the apparatus while the wafer is secured to the electrostatic chuck.
    Type: Application
    Filed: August 10, 2023
    Publication date: November 30, 2023
    Inventors: Shuang-Shiuan DENG, Fan-Chi LIN, Chueh-Chi KUO, Li-Jui CHEN, Heng-Hsin LIU
  • Semiconductor processing method and apparatus
    Patent number: 11830754
    Abstract: A method includes: positioning a wafer on an electrostatic chuck of an apparatus; and securing the wafer to the electrostatic chuck by: securing a first wafer region of the wafer to a first chuck region of the electrostatic chuck by applying a first voltage at a first time. The method further includes securing a second wafer region of the wafer to a second chuck region of the electrostatic chuck by applying a second voltage at a second time different from the first time; and processing the wafer by the apparatus while the wafer is secured to the electrostatic chuck.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: November 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shang-Shiuan Deng, Fan-Chi Lin, Chueh-Chi Kuo, Li-Jui Chen, Heng-Hsin Liu
  • SEMICONDUCTOR PROCESSING METHOD AND APPARATUS
    Publication number: 20220310431
    Abstract: A method includes: positioning a wafer on an electrostatic chuck of an apparatus; and securing the wafer to the electrostatic chuck by: securing a first wafer region of the wafer to a first chuck region of the electrostatic chuck by applying a first voltage at a first time. The method further includes securing a second wafer region of the wafer to a second chuck region of the electrostatic chuck by applying a second voltage at a second time different from the first time; and processing the wafer by the apparatus while the wafer is secured to the electrostatic chuck.
    Type: Application
    Filed: September 16, 2021
    Publication date: September 29, 2022
    Inventors: Shang-Shiuan DENG, Fan-Chi LIN, Chueh-Chi KUO, Li-Jui CHEN, Heng-Hsin LIU