Patents by Inventor Fan-Di Jou
Fan-Di Jou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10999576Abstract: A video processing method includes: an i-th block of a target frame partitioned into a plurality of blocks is received; at least one of a spatial attribute parameter and a temporal attribute parameter of an i-th block of the target frame is determined; and at least one of a delta quantization parameter and a modified Lagrange multiplier is determined according to at least one of the spatial attribute parameter and the temporal attribute parameter, for encoding the i-th block of the target frame.Type: GrantFiled: May 3, 2017Date of Patent: May 4, 2021Assignee: NOVATEK MICROELECTRONICS CORP.Inventors: Xin Huang, Fan-Di Jou
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Publication number: 20200404291Abstract: A video encoding apparatus and a video encoding method are provided. The video encoding apparatus comprises an encoding circuit and a region of interest (ROI) determination circuit. The encoding circuit performs a video encoding operation on an original video frame to generate an encoded video frame. The encoding information is generated by the video encoding operation during an encoding process. The ROI determination circuit reuses the encoding information generated by the video encoding operation to identify one or more ROI objects according to the initial ROI and generates one or more dynamic ROIs for tracking the one or more ROI objects within a current video frame for any one of a plurality of sequential video frames following the original video frame.Type: ApplicationFiled: September 1, 2020Publication date: December 24, 2020Applicant: Novatek Microelectronics Corp.Inventors: Xin Huang, Fan-Di Jou
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Publication number: 20200404290Abstract: A video encoding apparatus and a video encoding method are provided. The video encoding apparatus comprises an encoding circuit and a region of interest (ROI) determination circuit. The encoding circuit performs a video encoding operation on an original video frame to generate an encoded video frame. The encoding information is generated by the video encoding operation during an encoding process. The ROI determination circuit reuses the encoding information generated by the video encoding operation to identify one or more ROI objects according to the initial ROI and generates one or more dynamic ROIs for tracking the one or more ROI objects within a current video frame for any one of a plurality of sequential video frames following the original video frame.Type: ApplicationFiled: September 1, 2020Publication date: December 24, 2020Applicant: Novatek Microelectronics Corp.Inventors: Xin Huang, Fan-Di Jou
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Patent number: 10484710Abstract: A video encoding apparatus and method are provided. The video encoding apparatus includes a video encoding circuit and a control circuit. The video encoding circuit performs a video encoding operation on a video stream to produce an encoded stream. The control circuit controls the video coding circuit to perform the video encoding operation. The control circuit dynamically sets a current frame in the video stream to at least one of a long-term reference frame, a short-term reference frame, and a non-reference frame according to at least one of a playback latency control condition and an inter-frame correlation condition. The long-term reference frame and the short-term reference frame are used as the decoding reference frame in a video decoding operation.Type: GrantFiled: March 21, 2018Date of Patent: November 19, 2019Assignee: Novatek Microelectronics Corp.Inventor: Fan-Di Jou
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Patent number: 10477235Abstract: A video encoding apparatus and a video encoding method are provided. The video encoding apparatus includes an integer-pel motion estimation (IME) circuit, a temporal noise reduction (TNR) circuit, a fractional-pel motion estimation (FME) circuit and an encoding circuit. The IME circuit provides the first motion vector, the error value and the co-located error value of the current block in the current frame to the TNR circuit. By using the first motion vector, the error value and the co-located error value of the current block in the current frame, the TNR circuit performs the temporal filtering process on the current block in an original image data to produce a denoised image data to the FME circuit.Type: GrantFiled: July 11, 2017Date of Patent: November 12, 2019Assignee: Novatek Microelectronics Corp.Inventors: Ting Peng, Fan-Di Jou, Xin Huang
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Publication number: 20190297345Abstract: A video encoding apparatus and method are provided. The video encoding apparatus includes a video encoding circuit and a control circuit. The video encoding circuit performs a video encoding operation on a video stream to produce an encoded stream. The control circuit controls the video coding circuit to perform the video encoding operation. The control circuit dynamically sets a current frame in the video stream to at least one of a long-term reference frame, a short-term reference frame, and a non-reference frame according to at least one of a playback latency control condition and an inter-frame correlation condition. The long-term reference frame and the short-term reference frame are used as the decoding reference frame in a video decoding operation.Type: ApplicationFiled: March 21, 2018Publication date: September 26, 2019Applicant: Novatek Microelectronics Corp.Inventor: Fan-Di Jou
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Publication number: 20190075302Abstract: A video encoding apparatus and a video encoding method are provided. The video encoding apparatus comprises an encoding circuit and a region of interest (ROI) determination circuit. The encoding circuit performs a video encoding operation on an original video frame to generate an encoded video frame. The encoding information is generated by the video encoding operation during an encoding process. The ROI determination circuit reuses the encoding information generated by the video encoding operation to identify one or more ROI objects according to the initial ROI and generates one or more dynamic ROIs for tracking the one or more ROI objects within a current video frame for any one of a plurality of sequential video frames following the original video frame.Type: ApplicationFiled: October 3, 2017Publication date: March 7, 2019Applicant: Novatek Microelectronics Corp.Inventors: Xin Huang, Fan-Di Jou
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Publication number: 20190020894Abstract: A video encoding apparatus and a video encoding method are provided. The video encoding apparatus includes an integer-pel motion estimation (IME) circuit, a temporal noise reduction (TNR) circuit, a fractional-pel motion estimation (FME) circuit and an encoding circuit. The IME circuit provides the first motion vector, the error value and the co-located error value of the current block in the current frame to the TNR circuit. By using the first motion vector, the error value and the co-located error value of the current block in the current frame, the TNR circuit performs the temporal filtering process on the current block in an original image data to produce a denoised image data to the FME circuit.Type: ApplicationFiled: July 11, 2017Publication date: January 17, 2019Applicant: Novatek Microelectronics Corp.Inventors: Ting Peng, Fan-Di Jou, Xin Huang
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Publication number: 20180324426Abstract: A video processing method includes: an i-th block of a target frame partitioned into a plurality of blocks is received; at least one of a spatial attribute parameter and a temporal attribute parameter of an i-th block of the target frame is determined; and at least one of a delta quantization parameter and a modified Lagrange multiplier is determined according to at least one of the spatial attribute parameter and the temporal attribute parameter, for encoding the i-th block of the target frame.Type: ApplicationFiled: May 3, 2017Publication date: November 8, 2018Inventors: Xin Huang, Fan-Di Jou
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Patent number: 9613669Abstract: The disclosure provides a matrix transposing circuit for outputting a transposed N×N matrix. The matrix transposing circuit includes: an input resister array with m×N array; a memory having b storage blocks; an output register array with N×m array. N, m, n, b are integer in power of 2, N can be completely divided by m and n, and N=n×m×b. The matrix is divided into multiple sub-matrixes with m×n array to form Y matrix. Each of sub-matrixes is correspondingly stored to the b storage blocks. The input resister array has a first shifting direction to receive entry data and a second shifting direction to output data to the b storage blocks. The output resister array has a first shifting direction to read data from the b storage blocks and a second shifting direction to output the transposed matrix.Type: GrantFiled: March 19, 2015Date of Patent: April 4, 2017Assignee: Industrial Technology Research InstituteInventors: Chih-Hsu Yen, Fan-Di Jou
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Publication number: 20160012012Abstract: The disclosure provides a matrix transposing circuit for outputting a transposed N×N matrix. The matrix transposing circuit includes: an input resister array with m×N array; a memory having b storage blocks; an output register array with N×m array. N, m, n, b are integer in power of 2, N can be completely divided by m and n, and N=n×m×b. The matrix is divided into multiple sub-matrixes with m×n array to form Y matrix. Each of sub-matrixes is correspondingly stored to the b storage blocks. The input resister array has a first shifting direction to receive entry data and a second shifting direction to output data to the b storage blocks. The output resister array has a first shifting direction to read data from the b storage blocks and a second shifting direction to output the transposed matrix.Type: ApplicationFiled: March 19, 2015Publication date: January 14, 2016Inventors: Chih-Hsu Yen, Fan-Di Jou
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Publication number: 20150189333Abstract: Image processing and decoding methods for intra block copy and a system, encoder and decoder thereof are provided. The image processing method includes dividing a coding unit in an encoding frame into a plurality of sub-blocks, wherein the size of the coding unit is 2N×2N, and the size of the sub-blocks is N×2N or 2N×N, wherein N is a positive integer. The image processing method also includes searching a reference block corresponding to one of the sub-blocks within a searching range in the encoding frame and recording a relative position between the one of the sub-blocks and the reference block corresponding to the one of the sub-blocks. The image processing method further includes encoding the one of the sub-blocks according to the relative position.Type: ApplicationFiled: December 25, 2014Publication date: July 2, 2015Inventors: Chun-Lung Lin, Fan-Di Jou
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Patent number: 8767823Abstract: A method for frame memory compression divides each of a plurality of image frames in a frame memory into a plurality of blocks and quantizes a plurality of pixel values inside each block according to a predefined parameter, thereby generating a quantized block and a plurality of removed bits from the binary representation of the plurality of pixel values. A predictor is used to produce a residual block for the quantized block. A variable length encoder takes the residual block as an input and produces a coded bitstream. A packing unit is used to take the coded bitstream and the number of removed bits generated by the quantizer as inputs, so as to produce an entire codeword sequence of the block that meets a target bit rate by using a structure called group of blocks (GOB) to flexibly share available spaces of the blocks in the same GOB.Type: GrantFiled: July 8, 2011Date of Patent: July 1, 2014Assignee: Industrial Technology Research InstituteInventors: Fan-Di Jou, Chih-Hsu Yen, Chun-Lung Lin, Tian-Jian Wu
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Publication number: 20120250758Abstract: A method for frame memory compression divides each of a plurality of image frames in a frame memory into a plurality of blocks for taking a block as a compression unit. It quantizes a plurality of pixel values inside the block according to a predefined parameter, thereby generating a quantized block and a plurality of removed bits from the binary representation of the plurality of pixel values. A predictor is used to produce a residual block for the quantized block. A variable length encoder takes the residual block as an input and produces a coded bitstream. A packing unit is used to take the coded bitstream and the number of removed bits generated by the quantizer as inputs, so as to produce an entire codeword sequence of the block that meets a target bit rate by using a structure called group of blocks (GOB) to flexibly share available spaces of the blocks in the same GOB.Type: ApplicationFiled: July 8, 2011Publication date: October 4, 2012Inventors: Fan-Di Jou, Chih-Hsu Yen, Chun-Lung Lin, Tian-Jian Wu
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Patent number: 8264542Abstract: A system for image processing is provided. The system includes a region of interest (ROI) module receiving video from a camera and detects a ROI(s) in a first image. A lookup table generates a value responsive to block type for a first vanishing point (VP). A labeling module identifies a point “p” most close to the first VP, a point “q” most remote to the first VP and a length “h” between “p” and “q” in each ROI(s), and generates information on p, q and h. Another lookup table generates information on p?, q? and h?, wherein p? is a point most close to a second VP, q? is a point most remote to the second VP and h? is a length between p? and q? in ROI(s) in the second image. A transforming module transforms ROI(s) in the first image into an ROI in the second image.Type: GrantFiled: September 4, 2008Date of Patent: September 11, 2012Assignee: Industrial Technology Research InstituteInventors: Kual-Zheng Lee, Fan-Di Jou, Hung-Ming Chen
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Publication number: 20110113079Abstract: An information switch module and a related file transfer method are disclosed. The information switch module is coupled to a first and a second host. The information switch module includes a switch and a storage device, and the switch includes at least a system controller, a first and a second USB controllers and an input device connection module. The system controller uses the storage device to simulate at least two USB mass storage device, and sets up an output storage space and an input storage space in the at least two USB mass storage devices, respectively. The first and second hosts access the output storage space and the input storage space through the first and second USB controllers, respectively. After the first host stores a file into the output storage space, the system controller provides a corresponding data of the file to the input storage space for the second host.Type: ApplicationFiled: December 25, 2009Publication date: May 12, 2011Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Fan-Di Jou, Chong-Yie Chang
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Patent number: 7804900Abstract: A method for determining an encoding cost for a block of video data includes providing an image frame, partitioning the image frame into multiple blocks, obtaining a difference matrix for one of the multiple blocks, performing a part of an FHT (Fast Hadamard Transform) for the difference matrix including at least one butterfly step to obtain outputs in a sequence, the at least one butterfly step in number being one butterfly step less than that required for performing the entire FHT, performing an absolute value operation for each of the outputs, comparing the absolute values of every two of the outputs according to the sequence to determine a greater value for each of the every two absolute values, and adding the greater value of each of the every two absolute values thereby obtaining the encoding cost as a sum of absolute transformed differences (SATD) of the difference matrix.Type: GrantFiled: February 23, 2006Date of Patent: September 28, 2010Assignee: Industrial Technology Research InstituteInventor: Fan-Di Jou
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Publication number: 20090167866Abstract: A system for image processing in a multiview video environment including a first camera and a second camera is disclosed.Type: ApplicationFiled: September 4, 2008Publication date: July 2, 2009Inventors: Kual-Zheng Lee, Fan-Di Jou, Hung-Ming Chen
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Publication number: 20070198622Abstract: A method for determining an encoding cost for a block of video data includes providing an image frame, partitioning the image frame into multiple blocks, obtaining a difference matrix for one of the multiple blocks, performing a part of an FHT (Fast Hadamard Transform) for the difference matrix including at least one butterfly step to obtain outputs in a sequence, the at least one butterfly step in number being one butterfly step less than that required for performing the entire FHT, performing an absolute value operation for each of the outputs, comparing the absolute values of every two of the outputs according to the sequence to determine a greater value for each of the every two absolute values, and adding the greater value of each of the every two absolute values thereby obtaining the encoding cost as a sum of absolute transformed differences (SATD) of the difference matrix.Type: ApplicationFiled: February 23, 2006Publication date: August 23, 2007Inventor: Fan-Di Jou
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Publication number: 20060193386Abstract: Methods for fast mode decision of variable size block coding referring to spatial and temporal correlations between a current encoding motion block and at least one reference motion block to decide a best mode for encoding the current encoding motion block. The at least one reference motion block includes at least one neighboring motion block of the current motion block and/or a previous motion block that is located in a previous image frame at a position corresponding to that of the current encoding motion block in a current image frame. At least one block size mode is obtained from the at least one reference motion block. The methods further check the reliability of the at least one block size mode before using the at least one block size to encode the current motion block.Type: ApplicationFiled: February 25, 2005Publication date: August 31, 2006Inventors: Chia-Wen Lin, Yu-Yuan Tseng, Fan-Di Jou