Patents by Inventor Fan Liao

Fan Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11380549
    Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a metal layer is formed over a substrate using a fluorine-free deposition process, a nucleation layer is formed over the metal layer using a fluorine included deposition process, and a fill material is formed to fill an opening and form a gate stack.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: July 5, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Shiung Tsai, Chung-Chiang Wu, Wei-Fan Liao, Han-Ti Hsiaw
  • Patent number: 11124562
    Abstract: The present disclosure encompasses compositions and methods for effectively treating at least one symptom or sign of A plaque or cerebral amyloid angiopathy (CAA) associated symptoms, or for decreasing amyloid plaque load or CAA load. The method comprises administering an effective amount of an anti-ApoE antibody to a mammalian subject, such as to a human.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: September 21, 2021
    Assignee: Washington University
    Inventors: David Holtzman, Hong Jiang, Fan Liao, Thu Nga Bien-Ly, Mark S. Dennis, Jing Guo, Adam P. Silverman, Ryan J. Watts, Yin Zhang
  • Publication number: 20210102405
    Abstract: An improved mechanism of electric lock for door, comprising a case, on both side of the opening of the case arranged keeper arms, drive rods, and rotate member, and a drive mechanism connected to a drive member and a brake member; to achieve lock mode, the drive member drive the brake member to be engaged with the rotate member, making the keeper arms and drive rod unable to rotate, so the keeper arms can block the latch bolt from going through the opening; to achieve unlock mode, the drive member drive the brake member to be separate from the rotate member, making the keeper arms and drive rod able to rotate, so the latch bolt is able to go through the opening.
    Type: Application
    Filed: September 28, 2020
    Publication date: April 8, 2021
    Inventor: YI-FAN LIAO
  • Publication number: 20200357645
    Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a metal layer is formed over a substrate using a fluorine-free deposition process, a nucleation layer is formed over the metal layer using a fluorine included deposition process, and a fill material is formed to fill an opening and form a gate stack.
    Type: Application
    Filed: July 27, 2020
    Publication date: November 12, 2020
    Inventors: Jung-Shiung Tsai, Chung-Chiang Wu, Wei-Fan Liao, Han-Ti Hsiaw
  • Publication number: 20200284064
    Abstract: An electronic lock having a lock box arranged in the jamb and a face plate arranged in the door edge, the lock box has a brake gear with a screw sleeve arranged on a screw rod for driving the screw sleeve to displace back and forth, and by driving the rear end of the latch bolt, make the front end of the latch bolt be able to rotate inside the containing space of the lock box and go into or out of the bolt slot, and further goes into the lock slot of the face plate to achieve locking status; or the restoring of the expansion spring makes the latch bolt returned to the containing space to become unlocking status. Because the latch bolt is using the rotation to go in or out of the bolt slot and the screw sleeve and the screw rod which driving the latch bolt has the characteristic of high torque transmission, the present invention can ensure the operation stability of the lock during the locking and unlocking process.
    Type: Application
    Filed: February 12, 2020
    Publication date: September 10, 2020
    Inventor: YI-FAN LIAO
  • Patent number: 10727066
    Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a metal layer is formed over a substrate using a fluorine-free deposition process, a nucleation layer is formed over the metal layer using a fluorine included deposition process, and a fill material is formed to fill an opening and form a gate stack.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: July 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Shiung Tsai, Chung-Chiang Wu, Wei-Fan Liao, Han-Ti Hsiaw
  • Publication number: 20200090939
    Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a metal layer is formed over a substrate using a fluorine-free deposition process, a nucleation layer is formed over the metal layer using a fluorine included deposition process, and a fill material is formed to fill an opening and form a gate stack.
    Type: Application
    Filed: November 19, 2019
    Publication date: March 19, 2020
    Inventors: Jung-Shiung Tsai, Chung-Chiang Wu, Wei-Fan Liao, Han-Ti Hsiaw
  • Patent number: 10504734
    Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a metal layer is formed over a substrate using a fluorine-free deposition process, a nucleation layer is formed over the metal layer using a fluorine included deposition process, and a fill material is formed to fill an opening and form a gate stack.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: December 10, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Shiung Tsai, Chung-Chiang Wu, Wei-Fan Liao, Han-Ti Hsiaw
  • Publication number: 20190270794
    Abstract: The present disclosure encompasses compositions and methods for effectively treating at least one symptom or sign of A plaque or cerebral amyloid angiopathy (CAA) associated symptoms, or for decreasing amyloid plaque load or CAA load. The method comprises administering an effective amount of an anti-ApoE antibody to a mammalian subject, such as to a human.
    Type: Application
    Filed: October 27, 2017
    Publication date: September 5, 2019
    Inventors: David Holtzman, Hong Jiang, Fan Liao, Thu Nga Bien-Ly, Mark S. Dennis, Jing Guo, Adam P. Silverman, Ryan J. Watts, Yin Zhang
  • Patent number: 10290421
    Abstract: A manufacturing method of an attraction plate for electromagnetic door locks has an attraction plate positioned on a mounted body with a positioning hole at the center thereof. The attraction plate further has an arch portion at the center thereof which is reversely proportional to a thickness thereof and the thickness thereof is pre-determined for manufacturing a different height of the arch portion thereof for better effects. With an internal stress from the curved design, a tensile value of a door lock is increased for better operation of a door lock.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: May 14, 2019
    Inventor: Yi-Fan Liao
  • Patent number: 10269569
    Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a metal layer is formed over a substrate using a fluorine-free deposition process, a nucleation layer is formed over the metal layer using a fluorine included deposition process, and a fill material is formed to fill an opening and form a gate stack.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Shiung Tsai, Chung-Chiang Wu, Wei-Fan Liao, Han-Ti Hsiaw
  • Publication number: 20190096678
    Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a metal layer is formed over a substrate using a fluorine-free deposition process, a nucleation layer is formed over the metal layer using a fluorine included deposition process, and a fill material is formed to fill an opening and form a gate stack.
    Type: Application
    Filed: November 30, 2018
    Publication date: March 28, 2019
    Inventors: Jung-Shiung Tsai, Chung-Chiang Wu, Wei-Fan Liao, Han-Ti Hsiaw
  • Publication number: 20180151373
    Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a metal layer is formed over a substrate using a fluorine-free deposition process, a nucleation layer is formed over the metal layer using a fluorine included deposition process, and a fill material is formed to fill an opening and form a gate stack.
    Type: Application
    Filed: October 13, 2017
    Publication date: May 31, 2018
    Inventors: Jung-Shiung Tsai, Chung-Chiang Wu, Wei-Fan Liao, Han-Ti Hsiaw
  • Patent number: 9729074
    Abstract: A multifunctional signal isolation converter (10) is arranged in a safe area (20), and is applied to an electronic apparatus (40) arranged in a dangerous area (30). The multifunctional signal isolation converter (10) includes a microprocessor (108) and a power supply unit (116). The microprocessor (108) determines whether internal functions of the multifunctional signal isolation converter (10) are normal or not to obtain a first judgment value. The electronic apparatus (40) sends an input signal (42) to the microprocessor (108). The microprocessor (108) determines whether functions of the electronic apparatus (40) are normal or not to obtain a second judgment value according to the input signal (42). The microprocessor (108) controls whether the power supply unit (116) supplies a driving power (122) to the electronic apparatus (40) or not according to the first judgment value and the second judgment value.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: August 8, 2017
    Assignee: FINETEK CO., LTD.
    Inventors: Liang-Chi Chang, Jen-Shun Wang, Chi-Fan Liao, Yi-Liang Hou
  • Patent number: 9638570
    Abstract: A calibration method for a capacitance level sensing apparatus (10) is applied for a tank measurement. A measurement signal generating circuit (102) generates a measurement signal (104) to proceed with the tank measurement. According to a measurement result measured through the measurement signal (104), a sensing circuit (108) transmits a sensing signal (110) to a control unit (112). According to the sensing signal (110), the control unit (112) determines whether the sensing signal (110) is in an effective range or not. If the sensing signal (110) is in the effective range, the control unit (112) sets a total capacitance in accordance with the sensing signal (110) as a measurement base value. If the sensing signal (110) is not in the effective range, the control unit (112) controls the measurement signal generating circuit (102) to adjust a measurement frequency of the measurement signal (104).
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: May 2, 2017
    Assignee: FINETEK CO., LTD.
    Inventors: Yin-Lun Huang, Chao-Kai Cheng, Chi-Fan Liao, Yi-Liang Hou
  • Publication number: 20170038242
    Abstract: A calibration method for a capacitance level sensing apparatus (10) is applied for a tank measurement. A measurement signal generating circuit (102) generates a measurement signal (104) to proceed with the tank measurement. According to a measurement result measured through the measurement signal (104), a sensing circuit (108) transmits a sensing signal (110) to a control unit (112). According to the sensing signal (110), the control unit (112) determines whether the sensing signal (110) is in an effective range or not. If the sensing signal (110) is in the effective range, the control unit (112) sets a total capacitance in accordance with the sensing signal (110) as a measurement base value. If the sensing signal (110) is not in the effective range, the control unit (112) controls the measurement signal generating circuit (102) to adjust a measurement frequency of the measurement signal (104).
    Type: Application
    Filed: August 7, 2015
    Publication date: February 9, 2017
    Inventors: Yin-Lun HUANG, Chao-Kai CHENG, Chi-Fan LIAO, Yi-Liang HOU
  • Publication number: 20160251884
    Abstract: A manufacturing method of an attraction plate for electromagnetic door locks has an attraction plate positioned on a mounted body with a positioning hole at the center thereof. The attraction plate further has an arch portion at the center thereof which is reversely proportional to a thickness thereof and the thickness thereof is pre-determined for manufacturing a different height of the arch portion thereof for better effects. With an internal stress from the curved design, a tensile value of a door lock is increased for better operation of a door lock.
    Type: Application
    Filed: May 11, 2016
    Publication date: September 1, 2016
    Inventor: YI-FAN LIAO
  • Patent number: 9407226
    Abstract: Gain control in complementary common gate and common source amplifiers is disclosed. In an exemplary embodiment, an apparatus includes a first amplifier stage configured to amplify an input signal at an input terminal to generate a first amplified signal. The first amplifier stage includes a current diverter that selectively diverts current to set a gain of the first amplifier stage. The apparatus also includes a second amplifier stage configured to amplify the input signal at the input terminal to generate a second amplified signal. The second amplifier stage includes a gain control circuit to set a gain of the second amplifier stage.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: August 2, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventor: Chih-Fan Liao
  • Publication number: 20160182000
    Abstract: Gain control in complementary common gate and common source amplifiers is disclosed. In an exemplary embodiment, an apparatus includes a first amplifier stage configured to amplify an input signal at an input terminal to generate a first amplified signal. The first amplifier stage includes a current diverter that selectively diverts current to set a gain of the first amplifier stage. The apparatus also includes a second amplifier stage configured to amplify the input signal at the input terminal to generate a second amplified signal. The second amplifier stage includes a gain control circuit to set a gain of the second amplifier stage.
    Type: Application
    Filed: December 18, 2014
    Publication date: June 23, 2016
    Inventor: Chih-Fan Liao
  • Publication number: 20160172994
    Abstract: A multifunctional signal isolation converter (10) is arranged in a safe area (20), and is applied to an electronic apparatus (40) arranged in a dangerous area (30). The multifunctional signal isolation converter (10) includes a microprocessor (108) and a power supply unit (116). The microprocessor (108) determines whether internal functions of the multifunctional signal isolation converter (10) are normal or not to obtain a first judgment value. The electronic apparatus (40) sends an input signal (42) to the microprocessor (108). The microprocessor (108) determines whether functions of the electronic apparatus (40) are normal or not to obtain a second judgment value according to the input signal (42). The microprocessor (108) controls whether the power supply unit (116) supplies a driving power (122) to the electronic apparatus (40) or not according to the first judgment value and the second judgment value.
    Type: Application
    Filed: December 12, 2014
    Publication date: June 16, 2016
    Inventors: Liang-Chi CHANG, Jen-Shun WANG, Chi-Fan LIAO, Yi-Liang HOU