Patents by Inventor Fan W. Lai

Fan W. Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Array VT mode implementation for a simultaneous operation flash memory device
    Patent number: 6550028
    Abstract: An array threshold voltage test mode for a flash memory device is disclosed. During the test mode, a test voltage is routed directly to the gates of the flash memory transistors selected by a given address. If the test voltage causes the selected transistors to change state by crossing their threshold voltage level, the change will be reflected in the data outputs of the device. By varying the test voltages and the addresses and monitoring the data outputs, the array threshold voltage distribution can be determined for the entire device.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: April 15, 2003
    Assignees: Advanced Micro Devices, Inc., Fujitsu Limited
    Inventors: Takao Akaogi, Tiao-Hua Kuo, Fan W. Lai
  • Common flash interface implementation for a simultaneous operation flash memory device
    Patent number: 6275412
    Abstract: An alterable Common Flash Interface (“CFI”) is disclosed which includes a storage array which stores the CFI data. The storage array provides sub-circuits for encoding the CFI data. The sub-circuits comprise elements which can be altered by changing a single metal layer of the fabrication process.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: August 14, 2001
    Assignees: Advanced Micro Devices, Inc., Fujitsu Ltd.
    Inventors: Yasushi Kasa, Fan W. Lai
  • Common flash interface implementation for a simultaneous operation flash memory device
    Patent number: 6163478
    Abstract: An alterable Common Flash Interface ("CFI") is disclosed which includes a storage array which stores the CFI data. The storage array provides sub-circuits for encoding the CFI data. The sub-circuits comprise elements which can be altered by changing a single metal layer of the fabrication process.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: December 19, 2000
    Assignees: Advanced Micro Devices, Inc., Fujitsu, Ltd.
    Inventors: Yasushi Kasa, Fan W. Lai