Patents by Inventor Fanfu ZHOU

Fanfu ZHOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9697041
    Abstract: The invention discloses a method for dynamic interrupt balanced mapping method based on the current scheduling states of VCPUs. When the virtual I/O APIC of an SMP virtual machine needs to map a virtual interrupt into a VCPU of the virtual machine after receiving the virtual interrupt, a part of VCPUs in the active state are analyzed according to the scheduling states of all VCPUs of the current VM in a VMM scheduler, and the virtual interrupt is mapped into the active VCPUs to obtain lower interrupt processing delay. If a plurality of VCPUs are in the active state simultaneously, the interrupt load of each active VCPU is considered further, and the interrupt is mapped into the active VCPU with the current lowest current load to further ensure balancing of interrupt processing loads of all VCPUs, and therefore, the loads of VCPUs in the SPMP structure are more symmetrical to promote balancing of the overall performance of all VCPUs in the SMP structure.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: July 4, 2017
    Assignee: Shanghai Jiao Tong University
    Inventors: Haibing Guan, Jian Li, Ruhui Ma, Minjun Zhu, Fanfu Zhou
  • Publication number: 20160259664
    Abstract: The invention discloses a method for dynamic interrupt balanced mapping method based on the current scheduling states of VCPUs. When the virtual I/O APIC of an SMP virtual machine needs to map a virtual interrupt into a VCPU of the virtual machine after receiving the virtual interrupt, a part of VCPUs in the active state are analyzed according to the scheduling states of all VCPUs of the current VM in a VMM scheduler, and the virtual interrupt is mapped into the active VCPUs to obtain lower interrupt processing delay. If a plurality of VCPUs are in the active state simultaneously, the interrupt load of each active VCPU is considered further, and the interrupt is mapped into the active VCPU with the current lowest current load to further ensure balancing of interrupt processing loads of all VCPUs, and therefore, the loads of VCPUs in the SPMP structure are more symmetrical to promote balancing of the overall performance of all VCPUs in the SMP structure.
    Type: Application
    Filed: April 14, 2014
    Publication date: September 8, 2016
    Applicant: Shanghai Jiao Tong University
    Inventors: Haibing GUAN, Jian LI, Ruhui MA, Minjun ZHU, Fanfu ZHOU