Patents by Inventor Fang-Chang Chen

Fang-Chang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7092096
    Abstract: A method of analyzing structural characteristics of sidewall spacers fabricated on a wafer is disclosed. A grating bar having a plurality of grating targets is provided. A theoretical optical scatterometry spectrum is generated by subjecting the grating targets to optical scatterometry. An experimental optical scatterometry spectrum is generated by subjecting the sidewall spacers on the wafer to optical scatterometry. The structural characteristics of the sidewall spacers are equated with the structural characteristics of the grating targets when the theoretical optical scatterometry spectrum substantially matches the experimental optical scatterometry spectrum.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: August 15, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hun-Jan Tao, Fang-Chang Chen
  • Publication number: 20050185197
    Abstract: A method of analyzing structural characteristics of sidewall spacers fabricated on a wafer is disclosed. A grating bar having a plurality of grating targets is provided. A theoretical optical scatterometry spectrum is generated by subjecting the grating targets to optical scatterometry. An experimental optical scatterometry spectrum is generated by subjecting the sidewall spacers on the wafer to optical scatterometry. The structural characteristics of the sidewall spacers are equated with the structural characteristics of the grating targets when the theoretical optical scatterometry spectrum substantially matches the experimental optical scatterometry spectrum.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 25, 2005
    Inventors: Hun-Jan Tao, Fang-Chang Chen
  • Patent number: 6777340
    Abstract: A new method is provided for the etch of ultra-small patterns in a silicon based surface. Under the first embodiment, a hardmask layer over a substrate and a layer of ARC over the hardmask layer are successively patterned. The patterned layer of ARC is removed, the remaining patterned hardmask layer is used as a mask for etching the substrate. Under the second embodiment, a first hardmask layer over a substrate, a second hardmask layer over the first hardmask layer and a layer of ARC over the second hardmask layer are successively patterned. The patterned layer of ARC and the second hardmask layer are removed, the remaining first patterned hardmask layer is used as a mask for etching the substrate.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: August 17, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Hsien-Kuang Chiu, Fang-Chang Chen, Hun-Jan Tao, Yuan-Hung Chiu, Jeng-Horng Chen