Patents by Inventor Fang Chen
Fang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250020953Abstract: A polarizer and a liquid crystal display device are disclosed. The polarizer includes a first protection film, a polarization layer, a second protection film, a chroma viewing angle enhancement layer, and a surface protection film laminated. Material of the chroma viewing angle enhancement layer includes a resin composite. The resin composite includes a light diffusion agent. The light diffusion agent is aligned in the chroma viewing angle enhancement layer, an acute angle is defined between a long axis direction of light diffusion agent and a bottom surface of the chroma viewing angle enhancement layer, and the acute angle is greater than 0° and is less than or equal to 40°.Type: ApplicationFiled: August 10, 2023Publication date: January 16, 2025Applicant: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Ji LI, Guang ZENG, Hanming LI, Hongshan YIN, Fang TAN, Kai CHEN
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Publication number: 20250024446Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive an indication of a pair of transmission configuration indication (TCI) states associated with a physical downlink shared channel (PDSCH). The UE may select, based at least in part on the indication, a default beam for receiving information via the PDSCH. Numerous other aspects are described.Type: ApplicationFiled: January 12, 2022Publication date: January 16, 2025Inventors: Mostafa KHOSHNEVISAN, Yitao CHEN, Jing SUN, Peter GAAL, Tao LUO, Fang YUAN
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Patent number: 12195495Abstract: The present invention relates to a nucleoside analog having the structure of the following formula, a method for preparing the nucleoside analog, and an application of the nucleoside analog in nucleic acid sequencing, etc. wherein L1, L2, and L3 are each independently a covalent bond or a covalently linked group; B is a base or a base derivative; R1 is —OH or a phosphate group; R2 is H or a cleavable group; R3 is a detectable group or a targeting group; R5 is a polymerase reaction inhibitory group; R4 is H or —OR6, wherein R6 is H or a cleavable group; and C is a cleavable group or a cleavable bond.Type: GrantFiled: October 12, 2022Date of Patent: January 14, 2025Assignee: GeneMind Biosciences Co., Ltd.Inventors: Bin Liu, Luyang Zhao, Yuxiang Chen, Bo Yang, Jie Jian, Fang Chen, Qin Yan
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Patent number: 12189251Abstract: A signal control method suitable for a touch screen is provided. The signal control method comprises: switching a plurality of scan lines to an enabling voltage level sequentially in a display stage; turning on a plurality of switches sequentially to transmit a plurality of display data to a plurality of data lines when a first scan line of the plurality of scan lines is in an enabled voltage level, wherein a first switch of the plurality of switches is coupled to a first data line of the plurality of data lines, and the first data line corresponds to one of a plurality of dummy lines in a vertical direction, when the first scan line is in the enabled voltage level, the first switch is turned on after other switches are turned on; and setting the plurality of dummy lines to a touch voltage in a touch stage.Type: GrantFiled: November 23, 2022Date of Patent: January 7, 2025Assignee: AUO CORPORATIONInventors: Shih-Hsi Chang, Yu-Hsin Ting, Chung-Lin Fu, I-Fang Chen, Wei-Chun Hsu, Nan-Ying Lin
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Patent number: 12190591Abstract: A method for extracting an oil storage tank based on a high-spatial-resolution remote sensing image is provided, including: acquiring an oil storage tank sample, and randomly dividing the oil storage tank sample into a training set and a testing set; building an oil storage tank extraction model based on a Res2-Unet model structure, wherein the Res2-Unet is a deep learning network based on a UNet semantic segmentation structure, and a Res2Net convolution block is configured to change a feature interlayer learning to a granular learning and is arranged in a residual mode; and performing a precision verification on the testing set.Type: GrantFiled: April 19, 2022Date of Patent: January 7, 2025Assignee: Aerospace Information Research Institute, Chinese Academy of SciencesInventors: Bo Yu, Yu Wang, Fang Chen, Lei Wang
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Publication number: 20250008738Abstract: A memory device includes a plurality of first conductive pillars, a plurality of second conductive pillars, a plurality of gap filling pillars, a channel layer and first dielectric pillars. The gap filling pillars are located in between the first conductive pillars and the second conductive pillars. The channel layer is extending in a first direction, and located on side surfaces of the first conductive pillars and the second conductive pillars. The first dielectric pillars are located in between the channel layer and the plurality of gap filling pillars, wherein a length of an interface where the first dielectric pillars contact the gap filling pillars along the first direction is different from a length of the gap filling pillars along the first direction.Type: ApplicationFiled: September 16, 2024Publication date: January 2, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chieh-Fang Chen, Feng-Cheng Yang, Chung-Te Lin
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Publication number: 20250008504Abstract: Embodiments of the present disclosure provide a service sending method and apparatus, a service receiving method and apparatus, and a storage medium. The service sending method comprises: sending first scheduling information to a terminal, the first scheduling information being used for scheduling, in a first scheduling mode, resources for sending a first data segment of a target service; and configuring an association relationship between the first scheduling information and second scheduling information, and sending the second scheduling information to the terminal, the second scheduling information being used for scheduling, in a second scheduling mode, resources for sending a second data segment of the target service.Type: ApplicationFiled: October 18, 2022Publication date: January 2, 2025Inventors: Meiying YANG, Jiaqing WANG, Chen LUO, Fang-Chen CHENG
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Patent number: 12177785Abstract: Disclosed are an energy saving signal transmission method, a network-side device and a terminal, relating wireless communications. The method of the present application comprises: a base station using higher-layer signaling/physical-layer signaling to configure, for a terminal, a first transmission opportunity for transmitting a first energy saving signal, and/or configure, for the terminal, a second transmission opportunity for transmitting a second energy saving signal; and using the first transmission opportunity to transmit the first energy saving signal to the terminal, and/or using the second transmission opportunity to transmit the second energy saving signal to the terminal.Type: GrantFiled: February 28, 2020Date of Patent: December 24, 2024Assignee: DATANG MOBILE COMMUNICATIONS EQUIPMENT CO., LTD.Inventors: Jiaqing Wang, Meiying Yang, Fang-Chen Cheng, Lei Wang, Zheng Zhao, Chen Luo
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Publication number: 20240409173Abstract: The invention relates to a vehicle, preferably a bicycle, in particular an electric bicycle. The invention also relates to an optical feedback unit for use in a vehicle, preferably a bicycle, in particular an electric bicycle according to the invention. The invention further relates to a vehicle control unit, in particular a bicycle control unit, programmed to control at least one optical feedback unit for use in a vehicle, preferably a bicycle, in particular an electric bicycle according to the invention. The invention moreover relates to an assembly of at least one optical feedback unit according to the invention and at least one vehicle control unit, in particular a bicycle control unit, according to the invention.Type: ApplicationFiled: October 7, 2022Publication date: December 12, 2024Inventors: Yi-Fang Chen, Alexandre Phaneuf, Chun-Hsun Kao, Chien-I Chen, Mao-Chieh Tang, Chien-Cheng Kung, Job Hendrik Stehmann
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Publication number: 20240409180Abstract: Provided is a bicycle handlebar grip assembly for mounting on a handlebar of a bicycle handlebar, the bicycle handlebar grip assembly including at least one handgrip body for arranging on a handlebar, such as the end thereof, for a rider to thereby hold the handlebar, fixing means for fixing the bicycle handlebar grip assembly to the handlebar, such as for the purpose of securing or clamping this, and a coupling connection for coupling the handgrip body to the fixing meansType: ApplicationFiled: October 7, 2022Publication date: December 12, 2024Inventors: Yi-Fang Chen, Zhao-Bo Zhan, Alexandre Phaneuf, Chun-Hsun Kao, Chien-I Chen, Yu-Lin Chang, Job Hendrik Stehmann
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Publication number: 20240411011Abstract: This document describes techniques and systems for electromagnetic response simulation for arbitrary road surface profiles. An electromagnetic response simulator receives a position and an orientation of both an electromagnetic sensor (e.g., radar sensor) and a target, and a geometric profile of a road surface. The road surface may vary in elevation in the lateral and/or longitudinal directions. The electromagnetic response simulator estimates reflection points of electromagnetic rays along the geometric profile of the road surface and translates the positions and the orientations of the electromagnetic sensor and the target into respective local coordinates corresponding to each reflection point. The electromagnetic responses can then be calculated, corresponding simulated rays can be output to a sensor simulator.Type: ApplicationFiled: June 7, 2023Publication date: December 12, 2024Inventors: Fang Chen, Xiuzhang Cai, Bruno F. Camps Raga, Maryam Simons, Alexander Ioffe
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Publication number: 20240405008Abstract: Embodiments of the present disclosure provide a display panel and a display apparatus. The display panel includes: a substrate; a plurality of pixel circuits, a plurality of light-emitting devices, and a first signal line that are located on a side of the substrate. An output terminal of each of the pixel circuits is electrically connected to a first electrode of one of the light-emitting devices, and a second electrode of each of the plurality of light-emitting devices is electrically connected to the first signal line; and the first signal line comprises first portions and second portions provided in different layers and electrically connected, the first portions extend along a first direction, the second portions extend along a second direction, and the first direction intersects the second direction. The first signal line is of a grid-like structure, and thus a signal transmitted therethrough has a smaller voltage drop.Type: ApplicationFiled: August 16, 2024Publication date: December 5, 2024Inventors: Chao YU, Fei LI, Dian ZHANG, Fang CHEN
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Patent number: 12156381Abstract: A heat dissipation device of electronic equipment has a base, a heat dissipation group, and a cover. The base has an opening, a chamber, and a boss formed in the chamber. The heat dissipation group is connected to the base and has a circuit board and a cooling blade. The circuit board is mounted in the chamber, abuts against the boss, and has a heat source area and at least one non-heat-source area. The heat source area has a first surface facing the boss and a second surface facing the opening. The cooling blade is connected to the base and is located at the second surface. The first surface and the second surface of the heat source area respectively correspond to the boss and the cooling blade in location to provide a guiding direction for heat conduction. The cover is connected to the base.Type: GrantFiled: November 10, 2022Date of Patent: November 26, 2024Assignee: TECHWAY INDUSTRIAL CO., LTD.Inventors: Fu Hsiang Chung, Hong Fang Chen, Chun Tse Chan
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Patent number: 12154851Abstract: A method (of forming a three dimensional integrated circuit (3DIC) structure) includes: forming an interconnection layer including forming a first inter-layer via which connects at a first predetermined location to a first circuit region of a first device layer and which has a footprint that is at least one factor of ten smaller than a footprint of the first circuit region; and forming a first conductive segment in a first metallization layer of a second device layer so as to align with and thereby connect to the first inter-layer via.Type: GrantFiled: August 20, 2021Date of Patent: November 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-Lin Chuang, Ching-Fang Chen, Jia-Jye Shen
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Publication number: 20240374666Abstract: Described herein is a composition for use in the prevention or treatment of a viral infection, where the composition includes an extract, wherein the extract: (i) is a botanical extract; (ii) reduces viral infection into a host cell, with an IC50 of 10 ppm or less; and (iii) has a zeta potential of 10 mV or less. Also described herein are consumer goods and methods of using the composition.Type: ApplicationFiled: October 5, 2022Publication date: November 14, 2024Inventors: Qi WANG, Dong-Fang CHEN, Yong Ming YUAN, Yongtao WU, Frederic ZUCCA
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Publication number: 20240372005Abstract: A semiconductor structure includes semiconductor layers vertically stacked above a substrate, a gate structure wrapping around each of the semiconductor layers, a gate spacer disposed on sidewalls of the gate structure, a source/drain (S/D) feature abutting the semiconductor layers, and an S/D contact landing on a top surface of the S/D feature. In a cross-sectional view along a lengthwise direction of the semiconductor layers, a topmost point of the top surface of the S/D feature is above a top surface of a topmost one of the semiconductor layers, and a bottommost point of the top surface of the S/D feature is below the top surface of the topmost one of the semiconductor layers.Type: ApplicationFiled: July 9, 2024Publication date: November 7, 2024Inventors: Wei-Jen Lai, Wei-Yang Lee, De-Fang Chen, Ting-Wen Shih
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Publication number: 20240355875Abstract: A method of forming a semiconductor device includes forming a first semiconductor strip protruding above a first region of a substrate and a second semiconductor strip protruding above a second region of the substrate, forming an isolation region between the first semiconductor strip and the second semiconductor strip, forming a gate stack over and along sidewalls of the first semiconductor strip and the second semiconductor strip, etching a trench extending into the gate stack and isolation regions, the trench exposing the first region of the substrate and the second region of the substrate, forming a dielectric layer on sidewalls and a bottom surface of the trench and filling a conductive material over the dielectric layer and in the trench to form a contact, where the contact extends below a bottommost surface of the isolation region.Type: ApplicationFiled: July 2, 2024Publication date: October 24, 2024Inventors: Tai-Yuan Wang, Shu-Fang Chen
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Publication number: 20240347073Abstract: The present disclosure generally relates to a dual free layer two dimensional magnetic recording read head. The read head comprises a first lower shield, a first sensor disposed over the first lower shield, a first upper shield disposed over the first sensor, a read separation gap (RSG) disposed on the first upper shield, a second lower shield disposed on the RSG, a second sensor disposed over the second lower shield, and a second upper shield disposed over the second sensor. In one embodiment, the RSG comprises SiO2 and has a thickness of about 7 nm to about 14 nm. The SiO2 isolates the first sensor from the second sensor, and is a chemical mechanical processing (CMP) stop layer. In another embodiment, the RSG comprises a first sublayer comprising AlOx and a second sublayer comprising SiO2. The thicknesses of the first and second sublayers are based on an adjustable capacitance.Type: ApplicationFiled: July 31, 2023Publication date: October 17, 2024Applicant: Western Digital Technologies, Inc.Inventors: Fang CHEN, Chih-Ching HU, Yung-Hung WANG, Chen-Jung CHIEN, Ming MAO, Ming JIANG
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Publication number: 20240345640Abstract: Embodiments of the disclosure provide a method for resetting a processor and a computer device. The method includes: obtaining an image file corresponding to a coprocessor by a first component of the computer device, and loading the image file into a reference space in a RAM by the first component; loading the image file stored in the reference space into a specific space corresponding to the coprocessor by a second component of the computer device and validating the image file stored in the specific space by the second component in response to determining that the coprocessor needs to be reset; and resetting the coprocessor by the second component based on the image file stored in the specific space in response to the second component determining that the image file stored in the specific space is valid.Type: ApplicationFiled: October 5, 2023Publication date: October 17, 2024Applicant: ASPEED Technology Inc.Inventors: Shih-Fang Chen, Chin-Ting Kuo, Chia-Wei Wang, Chih-Chiang Mao
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Publication number: 20240347377Abstract: Various embodiments of the present application are directed to a method for forming a semiconductor-on-insulator (SOI) device with an impurity competing layer to absorb potential contamination metal particles during an annealing process, and the SOI structure thereof. In some embodiments, an impurity competing layer is formed on the dummy substrate. An insulation layer is formed over a support substrate. A front side of the dummy wafer is bonded to the insulation layer. An annealing process is performed and the impurity competing layer absorbs metal from an upper portion of the dummy substrate. Then, a majority portion of the dummy substrate is removed including the impurity competing layer, leaving a device layer of the dummy substrate on the insulation layer.Type: ApplicationFiled: June 26, 2024Publication date: October 17, 2024Inventors: Yu-Hung Cheng, Pu-Fang Chen, Cheng-Ta Wu, Po-Jung Chiang, Ru-Liang Lee, Victor Y. Lu, Yen-Hsiu Chen, Yeur-Luen Tu, Yu-Lung Yeh, Shi-Chieh Lin