Patents by Inventor Fang Cheng

Fang Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240003370
    Abstract: Provided is a furniture part assembly that includes a sidewall, a covering member, and a fitting. The sidewall is provided with a mounting feature. The covering member is detachably mounted on the mounting feature. The fitting is configured to be mounted to the mounting feature of the sidewall, and thus stacked on the sidewall, after the covering member is detached from the mounting feature. A piece of furniture having the furniture part assembly is also provided.
    Type: Application
    Filed: November 29, 2022
    Publication date: January 4, 2024
    Inventors: KEN-CHING CHEN, FANG-CHENG SU, YUE-HUA TANG, CHUN-CHIANG WANG
  • Publication number: 20230414756
    Abstract: The disclosure relates to a method for inducing antigen-specific T cell and the use thereof in treating cancer or virus infection. The method comprises culturing PBMCs with antigenic peptide, IL-2, IL-15 and IFN-?.
    Type: Application
    Filed: June 22, 2023
    Publication date: December 28, 2023
    Inventors: JAN-MOU LEE, CHIH-HAO FANG, YA-FANG CHENG
  • Publication number: 20230411373
    Abstract: A semiconductor package includes a first electric integrated circuit component, a second integrated circuit component, and a first plasmonic bridge. The second electric integrated circuit component is aside the first electric integrated circuit component. The first plasmonic bridge is vertically overlapped with both the first electric integrated circuit component and the second electric integrated circuit component. The first plasmonic bridge includes a first plasmonic waveguide optically connecting the first electric integrated circuit component and the second electric integrated circuit component.
    Type: Application
    Filed: August 4, 2023
    Publication date: December 21, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Kuang Liao, Cheng-Chun Tsai, Chen-Hua Yu, Fang-Cheng Chen, Wen-Chih Chiou, Ping-Jung Wu
  • Patent number: 11848198
    Abstract: A method for manufacturing a semiconductor device having a low-k carbon-containing dielectric layer includes: depositing a low-k carbon-containing dielectric material, which has a carbon content ranging from 16 atomic % to 23 atomic %, using a precursor mixture to form a carbon-containing dielectric layer having a k value ranging from 2.8 to 3.3 and a porosity ranging from 0.03% to 1.0%; forming the carbon-containing dielectric layer into a patterned carbon-containing dielectric layer having a recess therein by etching, the patterned carbon-containing dielectric layer having a porosity ranging from 1.0% to 2.0%; and filling the recess with an electrically conductive material to form an electrically conductive feature in the patterned carbon-containing dielectric layer.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: December 19, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kai-Fang Cheng, Ting-Ya Lo, Hsiao-Kang Chang
  • Patent number: 11830808
    Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method comprises providing a substrate including a conductive feature; forming aluminum (Al)-containing dielectric layer on the conductive feature; forming a low-k dielectric layer on the Al-containing dielectric layer; and etching the low-k dielectric layer to form a contact trench aligned with the conductive feature. A bottom of the contact trench is on a surface of the Al-containing dielectric layer.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: November 28, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Yen Huang, Kai-Fang Cheng, Chi-Lin Teng, Hai-Ching Chen, Tien-I Bao
  • Patent number: 11830861
    Abstract: A semiconductor package includes a first optical transceiver, a second optical transceiver, a third optical transceiver, and a plasmonic waveguide. The first optical transceiver, the second optical transceiver, and the third optical transceiver are stacked in sequential order. The first optical transceiver and the third optical transceiver respectively at least one optical input/output portion for transmitting and receiving an optical signal. The plasmonic waveguide includes a first segment, a second segment, and a third segment optically coupled to one another. The first segment is embedded in the first optical transceiver. The second segment extends through the second optical transceiver. The third segment is embedded in the third optical transceiver. The first segment is optically coupled to the at least one optical input/output portion of the first optical transceiver and the third segment is optically coupled to the at least one optical input/output portion of the third optical transceiver.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: November 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Kuang Liao, Cheng-Chun Tsai, Chen-Hua Yu, Fang-Cheng Chen, Wen-Chih Chiou, Ping-Jung Wu
  • Publication number: 20230378168
    Abstract: An interfacial structure, along with methods of forming such, are described. The structure includes a first interfacial layer having a first dielectric layer, a first conductive feature disposed in the first dielectric layer, and a first thermal conductive layer disposed on the first dielectric layer. The structure further includes a second interfacial layer disposed on the first interfacial layer. The second interfacial layer is a mirror image of the first interfacial layer with respect to an interface between the first interfacial layer and the second interfacial layer. The second interfacial layer includes a second thermal conductive layer disposed on the first thermal conductive layer, a second dielectric layer disposed on the second thermal conductive layer, and a second conductive feature disposed in the second dielectric layer.
    Type: Application
    Filed: August 3, 2023
    Publication date: November 23, 2023
    Inventors: Kai-Fang CHENG, Kuang-Wei YANG, Cherng-Shiaw TSAI, Hsiaokang CHANG
  • Patent number: 11804583
    Abstract: A light emitting device including a substrate, a first pad, a second pad, a light emitting diode, a first connection structure, a second connection structure, and a patterned adhesive layer and a method for manufacturing the same are provided. The first pad and the second pad are located on the substrate. The light emitting diode includes a first semiconductor layer, a second semiconductor layer overlapping the first semiconductor layer, a first electrode and a second electrode. The first electrode and the second electrode are respectively connected to the first semiconductor layer and the second semiconductor layer. The first connection structure electrically connects the first electrode to the first pad. The second connection structure electrically connects the second electrode to the second pad. The patterned adhesive layer is located between the substrate and the light emitting diode and does not contact the first connection structure and the second connection structure.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: October 31, 2023
    Assignee: Au Optronics Corporation
    Inventors: Fang-Cheng Yu, Cheng-Chieh Chang, Cheng-Yeh Tsai
  • Patent number: 11804187
    Abstract: An electronic device may include a display having an array of pixels and a backlight that provides backlight illumination for the array of pixels. The backlight may be a direct-lit backlight with a two-dimensional array of light-emitting diodes operable in a local dimming scheme. The electronic device may include control circuitry that provides pixel signals to the array of pixels and backlight signals to the backlight. The control circuitry may adjust the pixel signals and the backlight signals to compensate for brightness and color non-uniformity in the backlight. To compensate for image-dependent backlight non-uniformity, the control circuitry may simulate artificial backlight data based on the target image to be displayed and stored point spread information. To compensate for white-point-dependent backlight non-uniformity, the control circuitry may use measured actual backlight data that describes color variations across the backlight for a given target white point.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: October 31, 2023
    Assignee: Apple Inc.
    Inventors: Fang-Cheng Lin, Chengrui Le, Yi-Pai Huang, Suraj P Gorkhali, Tobias Jung, He Li, Yansong Liu
  • Patent number: 11796825
    Abstract: A display apparatus including: a display screen including multiple light-emitting points and a first side, wherein light generated by the light-emitting points emits from the first side; and a microlens array provided on the first side of the display screen, the microlens array includes multiple microlenses arranged in an array, an orthographic projection of the microlens array on the display screen covers the display screen, and the display screen is provided on a focal surface of the microlens array. The focal lengths of the multiple microlenses increase sequentially from the center of the microlens array to the edge of the microlens array, so that a beam width of the light that is emitted from each light-emitting point of the display, transmits through the microlens array and is incident into a pupil of a human eye is less than a preset threshold.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: October 24, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jinye Zhu, Jian Gao, Fang Cheng, Tao Hong, Jing Yu, Tianyang Han
  • Patent number: 11776492
    Abstract: A device may include an electronic display having a backlight that generates light and multiple display pixels that modulate the amount of generated light emitted from the electronic display based on compensated image data. The backlight may include multiple illuminators that generate the light, and a first color component illuminator may have a slower response rate than a second color component illuminator. The device may also include image processing circuitry that generates the compensated image data by compensating input image data for a color shift associated with a change in brightness of the backlight and the slower response rate of the first color component illuminator. The input image data may be compensated by increasing first color component pixel values of the input image data relative to second color component pixel values of the input image data, and the compensated image data may be output to the electronic display.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: October 3, 2023
    Assignee: Apple Inc.
    Inventors: Chengrui Le, Fang-Cheng Lin, Alexey Kornienko
  • Publication number: 20230287439
    Abstract: Provided herein are methods for integrating a gene of interest into a chromosome of a host cell. In some embodiments, the methods include introducing into a host cell a first plasmid comprising a transposase coding sequence and a donor sequence, which includes a selectable marker coding sequence flanked by a first and a second lox site and is itself flanked by inverted repeats recognized by the transposase. Following transposase-mediated chromosomal integration of the donor sequence into the host cell, a second plasmid is introduced, which comprises the gene of interest and a second selectable marker coding sequence, both flanked by a first and a second lox site. The gene of interest is chromosomally integrated into the host cell by recombinase-mediated cassette exchange (RMCE) between the donor sequence and the second plasmid via Cre-lox recombination. Further provided herein are host cells, vectors, and methods of producing a product related thereto.
    Type: Application
    Filed: May 3, 2023
    Publication date: September 14, 2023
    Inventors: Yasuo YOSHIKUNI, Gaoyan WANG, Zhiying ZHAO, Robert Cameron COATES, Jan-Fang CHENG, David ROBINSON
  • Publication number: 20230290705
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate and a device region formed over the substrate. The semiconductor structure further includes an interconnect structure formed over the device region and a first passivation layer formed over the interconnect structure. The semiconductor structure also includes a metal pad formed over and extending into the first passivation layer and a second passivation layer formed over the first passivation layer. The second passivation layer includes a thermal conductive material, and the thermal conductivity of the thermal conductive material is higher than 4 W/mK.
    Type: Application
    Filed: March 14, 2022
    Publication date: September 14, 2023
    Inventors: Cheng-Chin LEE, Shau-Lin SHUE, Shao-Kuan LEE, Hsiao-Kang CHANG, Cherng-Shiaw TSAI, Kai-Fang CHENG, Hsin-Yen HUANG, Ming-Hsien LIN, Chuan-Pu CHOU, Hsin-Ping CHEN, Chia-Tien WU, Kuang-Wei YANG
  • Publication number: 20230279962
    Abstract: In the present disclosure, a cold waterway, a hot waterway and a mixing waterway and a main body are formed integrally in a valve structure, and a faucet structure has the valve structure, a valve core and a handle cover. The cold waterway, the hot waterway and the mixing waterway are formed in the main body by drilling the main body, such that the above three waterways and the main body are formed integrally. Then, an outlet is disposed to be connected to an annular waterway surrounding the main body, and the annular waterway outputs water to the outlet. Thus, it effectively solves the problems of water seepage caused by the tolerance between components or the long-term use of the valve core, and achieves the main advantages of effectively saving water by avoiding water seepage, and eliminating the need for gaskets to avoid poor sealing after aging.
    Type: Application
    Filed: March 6, 2023
    Publication date: September 7, 2023
    Inventors: HSIU-TE YAO, I-FANG CHENG
  • Publication number: 20230276154
    Abstract: A magnetically attractable Bluetooth speaker is disclosed, including a speaker housing, a loudspeaker, a control circuit board, and a magnet. The loudspeaker is electrically connected to the control circuit board. The speaker housing includes a limiting part for securing the magnet. The magnet is fixedly arranged in the limiting part, and the magnet is arranged outside the magnetic circuit range of the loudspeaker. With such a structure, by arranging the magnet in the speaker housing, the user experience of the speaker can be greatly improved, so that the user can place it in different manners depending on their different needs. Compared with the traditional ordinary speakers that can only be placed on a horizontal plane or a surface with a small slope, the speaker provided by the present disclosure has better flexibility in use.
    Type: Application
    Filed: February 10, 2023
    Publication date: August 31, 2023
    Inventors: XIAOMIN ZHU, TAO ZOU, YAJIAN LIU, HANQIAO ZHANG, FANG CHENG, YICHAO FAN, Dan Cass
  • Publication number: 20230253286
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes an electrical interconnect structure, a thermal interconnect structure, and a thermal passivation layer over a substrate. The electrical interconnect structure includes interconnect vias and interconnect wires embedded within interconnect dielectric layers. The thermal interconnect structure is arranged beside the electrical interconnect structure and includes thermal vias, thermal wires, and/or thermal layers. Further, the thermal interconnect structure is embedded within the interconnect dielectric layers. The thermal passivation layer is arranged over a topmost one of the interconnect dielectric layers. The thermal interconnect structure has a higher thermal conductivity than the interconnect dielectric layers.
    Type: Application
    Filed: April 18, 2023
    Publication date: August 10, 2023
    Inventors: Shao-Kuan Lee, Cherng-Shiaw Tsai, Ting-Ya Lo, Cheng-Chin Lee, Chi-Lin Teng, Kai-Fang Cheng, Hsin-Yen Huang, Hsiao-Kang Chang, Shau-Lin Shue
  • Publication number: 20230213801
    Abstract: An electronic device is provided. The electronic device includes a backboard, a circuit board disposed on the backboard, a light source disposed on the circuit board, a housing disposed on the backboard, and a panel disposed on the housing. The panel contacts the housing, and the light source and the circuit board are disposed between the panel and the backboard.
    Type: Application
    Filed: February 24, 2023
    Publication date: July 6, 2023
    Inventors: Fang-Cheng JHOU, Tsu-Hsien KU
  • Patent number: 11674145
    Abstract: Provided herein are methods for integrating a gene of interest into a chromosome of a host cell. In some embodiments, the methods include introducing into a host cell a first plasmid comprising a transposase coding sequence and a donor sequence, which includes a selectable marker coding sequence flanked by a first and a second lox site and is itself flanked by inverted repeats recognized by the transposase. Following transposase-mediated chromosomal integration of the donor sequence into the host cell, a second plasmid is introduced, which comprises the gene of interest and a second selectable marker coding sequence, both flanked by a first and a second lox site. The gene of interest is chromosomally integrated into the host cell by recombinase-mediated cassette exchange (RMCE) between the donor sequence and the second plasmid via Cre-/cuc recombination. Further provided herein are host cells, vectors, and methods of producing a product related thereto.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: June 13, 2023
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Yasuo Yoshikuni, Gaoyan Wang, Zhiying Zhao, Robert Cameron Coates, Jan-Fang Cheng, David Robinson
  • Publication number: 20230172472
    Abstract: A biological energy signal acquisition and conversion device comprises: a signal acquisition module, enhancing a biological energy signal generated by an original biological energy body, and extracting the signal; a signal processing module, receiving the extracted original biological energy signal and filtering and amplifying the signal, and generating an output energy signal; and a signal output unit, being able to enhance an output function in cooperation with a magnetic substance, and output the energy signal to a biological energy carrier. By shortening the distance between the original biological energy body and a signal receiving unit, and using the magnetic substance to excite the original biological energy body, the strength of the received extracted original biological energy signal is enhanced, and the noise proportion is greatly reduced, reducing the technical complexity and costs for back-end signal processing, and improving the effect of a biological energy signal.
    Type: Application
    Filed: August 28, 2019
    Publication date: June 8, 2023
    Inventors: Chun-Fang Cheng, Ting-Han Hong, Po-Yuan Kung, Jia-De Ni, Hsun-Tsan Shen, Wen-Chun Yeh
  • Patent number: 11663940
    Abstract: The present disclosure relates to a display assembly, a display device and a driving method. The display assembly includes: a display panel provided with a plurality of pixel islands distributed in an array, any one of the pixel islands including sub-pixels continuously arranged along a set direction; and a lens layer arranged on a light exit surface of the display panel and including lenses arranged along the set direction. A lenticular lens pitch is not greater than a size of an opening of each pixel island in the set direction, and along the set direction, a sub-pixel pitch in each of the pixel islands is smaller than a half of the lenticular lens pitch. The lenticular lens pitch is equal to a sum of a size of each lenticular lens in the set direction and a distance between two adjacent ones of the plurality of lenticular lenses.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: May 30, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jian Gao, Xue Dong, Sen Ma, Xiaochuan Chen, Tao Hong, Yanliu Sun, Fang Cheng