Abstract: A semiconductor memory device and a manufacturing method thereof are provided in the present invention. An under-cut structure is formed at an edge of a bit line contact opening in the process of forming the bit line contact opening for avoiding short problems caused by alignment shifting, and the process window of the process of forming the bit line contact opening may be improved accordingly.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first low dielectric constant (low-k) layer, a first metal layer, a metal cap layer, a dielectric on dielectric (DoD) layer, an etch stop layer (ESL), a second low-k layer, a metal via and a second metal layer. The dielectric constant of the first low-k layer is less than 4. The first metal layer is embodied in the first low-k layer. The first low-k layer exposes the first metal layer. The metal cap layer is disposed on the first metal layer. The DoD layer is disposed on the first low-k layer. The etch stop layer is disposed on the metal cap layer and the DoD layer. The second low-k layer is disposed above the etch stop layer. The metal via is embodied in the second low-k layer and connected to the first metal layer.

Abstract: Provided in the present disclosure is a control system for a heat supply apparatus of a nuclear power plant, comprising: a first-stage pressure measurement means configured for measuring a first-stage pressure of a turbine to obtain a first-stage pressure signal; a high-exhaust pressure measurement means configured for measuring an exhaust pressure of a turbine high-pressure cylinder to obtain an exhaust pressure signal; a steam extraction heating flow rate measurement means configured for measuring a steam extraction heating flow rate to obtain a steam extraction heating flow rate signal; a data acquisition module configured for acquiring and transmitting the measured first-stage pressure signal, the measured exhaust pressure signal and the measured steam extraction heating flow rate signal to a core operation processing module; the core operation processing module; and a the signal output module.

Abstract: The invention provides an exposure method of semiconductor patterns, which comprises the following steps: providing a substrate, performing a first exposure step with a first photomask, forming a first pattern in a first region on the substrate, and performing a second exposure step with a second photomask, forming a second pattern in a second region on the substrate, the first pattern and the second pattern are in contact with each other, and at an interface of the first region And the second region, the first pattern and the second pattern are aligned with each other.

Abstract: A contact lens product, a packaging case thereof, and a detection method for the same are provided. The packaging case (1) includes an accommodating slot body (11) and a sheet body (12) connected to the accommodating slot body (11). The accommodating slot body (11) has a plurality of optical microstructures (11c) formed on an inner surface (11b) thereof. Each of the optical microstructures (11c) has a height-to-width ratio being within a range from 0.01 to 0.1, whereby the accommodating slot body (11) has a first transparency. The accommodating slot body (11) is configured to allow at least part of the optical microstructures (11c) to be in contact with a preservation liquid (4) for enabling a part of the accommodating slot body (11) corresponding in position thereto to have a second transparency that is greater than the first transparency.

Abstract: A test system and method of testing are provided. In some embodiments, a system for testing an integrated circuit package includes a device tester. The device tester includes a socket, a cylinder head unit engageable with the socket, and a pressure regulator. The socket includes a first pressure cylinder configured to engage a first region of the integrated circuit package and a second pressure cylinder configured to engage a second region of the integrated circuit package. The pressure regulator is configured to provide at gas at a first pressure to the first pressure cylinder and to provide the gas at a second pressure different than the first pressure to the second pressure cylinder.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a plurality of gate conductive patterns on the substrate; an interlayer dielectric layer covering the gate conductive patterns on the substrate; an interconnect structure comprising a contact plug and a first contact pad, the contact plug extending through the interlayer dielectric layer to the substrate, the first contact pad fully covering a top of the contact plug and extending laterally over part of a top surface of the interlayer dielectric layer; and a second contact pad formed on the top surface of the interlayer dielectric layer and spaced apart from a side edge of the first contact pad, wherein the second contact pad is formed and fully overlays on the interlayer dielectric layer and an isolation plug is spaced apart from the first contact pad.

Abstract: A spatial light modulator device includes an array of spatial light modulator cells located over a substrate. Each of the spatial light modulator cells includes: a layer stack including a phase change material plate, a spacer dielectric material plate that underlies the phase change material plate, and a metallic heater plate underlying the spacer dielectric material plate and including outer sidewalls; and a pair of bottom electrode via structures contacting a respective surface segment of a bottom surface of the metallic heater plate. Each of the outer sidewalls of the metallic heater plate is vertically coincident with a respective sidewall of the spacer dielectric material plate and with a respective sidewall of the phase change material plate.

Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.

Abstract: Provided are a multiple-level interconnect structure having a scatterometry test layer and a manufacturing method thereof. The multiple level interconnect structure includes a patterned reflective layer, a bulk reflective layer and a patterned test layer. The patterned reflective layer is disposed on a substrate and includes a first reflective pattern and a second reflective pattern separated from each other. The bulk reflective layer is disposed on the patterned reflective layer. The patterned test layer is disposed on the bulk reflective layer.

Abstract: Provided herein is N-((4,6-dimethyl-2-oxo-1,2-dihydropyridin-3-yl)methyl)-5-(ethyl (tetrahydro-2H-pyran-4-yl)amino)-4-methyl-4?-(morpholinomethyl)-[1,1?-biphenyl]-3-carboxamide hydrobromide. Also provided herein is a particular polymorph form of this compound.

Abstract: Provided herein are methods for the treatment of bladder cancer.

Abstract: The present invention discloses a method for outputting a command by detecting a movement of an object, which includes the following steps. First, an image capturing device captures images generated by the movement of the object at different timings by. Next, a motion trajectory is calculated according to the plurality of images. Further next, a corresponding command is outputted according to the motion trajectory. The present invention also provides a system which employs the above-mentioned method.

Abstract: A production method for a bispecific antibody, comprising constructing cells for producing a bispecific antibody, screening the cells, culturing the cells obtained in step one to obtain a culture solution, and performing separation and purification to obtain the bispecific antibody. The cells comprise CHO cells. The culture mode comprises fed-batch culture or perfusion culture. Various influence factors in fermentation culture and separation and purification are comprehensively analyzed, and by effective control, all factors can effectively cooperate, so that a high-purity bispecific antibody is efficiently produced, the daily output can reach 3 g/L or above, and the purity of the purified bispecific antibody can reach 90% or above. Moreover, the production process is amplified and verified, the process is stable and reliable, the cost is low, a great breakthrough is achieved compared with an existing production method.

Abstract: An exemplary work press assembly for a test handler includes a presser and a guide frame. The presser is configured to secure a device under test (DUT) and press the DUT into a socket for testing. The guide frame is configured to receive guide pins of the socket. The presser extends through an opening of the guide frame, and the guide frame is sandwiched between a first presser portion and a second presser portion. The presser is formed of a first material having a first coefficient of thermal expansion (CTE), and the guide frame is formed from a second material having a second CTE that is less than the first CTE. In some embodiments, a thermal insulation layer(s) separates the presser from the guide frame. In some embodiments, a spacing between sidewalls of the presser and sidewalls of the guide frame is configured to accommodate thermal expansion of the presser.

Abstract: The invention provides a composition comprising disintegrated whole bilberry (Vaccinium myrtillus) berries and disintegrated whole lingonberry (Vaccinium vitis-idaca) berries, wherein the bilberry berries and lingonberry berries are disintegrated by homogenization. A method of manufacturing the composition, as well as a method of amelioration of a cognitive function, such as cognition, memory, and working memory, in a healthy human subject, are also provided.

Abstract: A gait evaluating system including a processor is provided. The processor identifies whether a gait type of the user belongs to a normal gait, a non-neuropathic gait or a neuropathic gait based on step feature values of a user and walking limb feature values of the user. In response to that the gait type of the user belongs to the non-neuropathic gait, the processor controls the display panel to display a first auxiliary information, a second auxiliary information, and a third auxiliary information. The first auxiliary information indicates a potential sarcopenia of the user. The second auxiliary information indicates a dietary guideline for muscle building and muscle strengthening. The third auxiliary information shows a motion instruction video for regaining or maintaining muscle strength of the user.

Abstract: A method of forming a semiconductor device is provided. The method includes forming a redistribution layer (RDL) substrate over an active side of a semiconductor die. The RDL substrate includes a plurality of under-bump metallization (UBM) structures. A die pad of a leadframe is affixed on a backside of the semiconductor die. The leadframe includes a plurality of leads having a first portion of each lead connected to the die pad and a second portion of each lead extending vertically along sidewalls of the semiconductor die toward a plane of the RDL substrate. An encapsulant encapsulates the semiconductor die and the leadframe, a lead tip portion of each lead is exposed through the encapsulant.