Abstract: The disclosure relates to the field of information processing, and more particularly to a method, electronic device and storage medium for information processing. According to the embodiments of the disclosure, the method of information processing includes: establishing an association relationship between a first application and a first file, the first application being a program for processing a service processing flow; determining service processing flow information of the first application; and displaying first information corresponding to the service processing flow information at a predetermined position in the first file. The method of information processing provided by the embodiments of the disclosure enables users to conveniently obtain service processing flow information related to the first file through the first file, and facilitates subsequent audit and review of the file or the corresponding service processing flow.

Abstract: The disclosure provides a method, apparatus, terminal and storage medium for service processing based on an online document. The method includes: determining a first application; establishing an association between the first application and a first online document; and performing a first processing on the first online document according to the information related to the first application. The information processing method provided by embodiments of the present disclosure can process the first online document based on the information related to the first application, so that the data processing of the first online document can adapt to the service logic of the first application itself. While fully utilizing the characteristics of openness and easy collaboration of the online document, the online document can reflect or adapt to the service logic, and improve the flexibility and stability of the service.

Abstract: The disclosure relates to the field of computers, and particularly to a method, apparatus, electronic device and storage medium for information processing. The method of information processing provided in the present disclosure includes: at a time before the end of a service processing flow about a first file, determining a save strategy for the first file in response to a user operation, so that the first file is saved based on the save strategy after the end of the service processing flow.

Abstract: A method of data processing for an application includes displaying service data in a first display area of a first application display interface; displaying first online document information in a second display area of a first application display interface, the first online document carrying a file required for processing the service data; and processing the service data in response to a first operation initiated based on the content carried by the first online document. The method of data processing for an application displays business data and the first online document in the first display area and the second display area respectively, and operates the business data based on the first operation initiated by the content carried by the first online document, so that the processing method of business data is associated with the content carried by the first online document, thereby improving the flexibility and convenience of business data processing.

Abstract: This disclosure provides a method and apparatus, terminal and storage medium for information processing. The method of information processing includes: receiving a first document for processing a business flow, the business flow comprising one or more business nodes; and when a predetermined operation is performed on a content of the first document, determining an associated person associated with at least one business node of the business flow based on the predetermined operation, and sending a notification message to the associated person.

Abstract: A touch sensor includes a substrate, sensing channels, and a protective layer. The sensing channels are disposed at intervals on a surface of the substrate, and any one of the sensing channels includes an electrode portion and a silver trace portion electrically connected to the electrode portion. The protective layer is disposed on the substrate and covers and encapsulates the sensing channels. After the touch sensor is subjected to a salt spray test with sodium chloride solution of a mass percentage concentration of 5% at a rate of 1 mL/H to 2 mL/H under an ambient temperature of 35° C. for 48 hours, a resistance change rate of any one of the sensing channels is less than or equal to 10%, and a resistance distribution difference between the sensing channels is less than or equal to 10%.

Abstract: A touch sensor includes a substrate, sensing channels, and a protective layer. The sensing channels are disposed at intervals on a surface of the substrate, and any one of the sensing channels includes an electrode portion and a silver trace portion electrically connected to the electrode portion. The protective layer is disposed on the substrate and covers and encapsulates the sensing channels. After the touch sensor is subjected to a salt spray test with sodium chloride solution of a mass percentage concentration of 5% at a rate of 1 mL/H to 2 mL/H under an ambient temperature of 35° C. for 48 hours, a resistance change rate of any one of the sensing channels is less than or equal to 10%, and a resistance distribution difference between the sensing channels is less than or equal to 10%.

Abstract: In an embodiment, a method includes: receiving a first wafer and a second wafer, the first wafer including a first alignment mark, the first alignment mark including a first grid of first magnetic features, the second wafer including a second alignment mark, the second alignment mark including a second grid of second magnetic features; aligning the first alignment mark with the second alignment mark in an optical alignment process; after the optical alignment process, aligning the first alignment mark with the second alignment mark in a magnetic alignment process, north poles of the first magnetic features being aligned with south poles of the second magnetic features, south poles of the first magnetic features being aligned with north poles of the second magnetic features; and forming bonds between the first wafer and the second wafer.

Abstract: In an embodiment, a structure includes: a first device including a first dielectric layer and a first alignment mark in the first dielectric layer, the first alignment mark including a first magnetic cross, the first magnetic cross having a first north pole and a first south pole; and a second device including a second dielectric layer and a second alignment mark in the second dielectric layer, the second alignment mark including a second magnetic cross, the second magnetic cross having a second north pole and a second south pole, the first north pole aligned with the second south pole, the first south pole aligned with the second north pole, the first dielectric layer bonded to the second dielectric layer by dielectric-to-dielectric bonds, the first alignment mark bonded to the second alignment mark by metal-to-metal bonds.

Abstract: A touch sensor includes a substrate, sensing channels, and a protective layer. The sensing channels are disposed at intervals on a surface of the substrate, and any one of the sensing channels includes an electrode portion and a silver trace portion electrically connected to the electrode portion. The protective layer is disposed on the substrate and covers and encapsulates the sensing channels. After the touch sensor is subjected to a salt spray test with sodium chloride solution of a mass percentage concentration of 5% at a rate of 1 mL/H to 2 mL/H under an ambient temperature of 35° C. for 48 hours, a resistance change rate of any one of the sensing channels is less than or equal to 10%, and a resistance distribution difference between the sensing channels is less than or equal to 10%.

Abstract: A includes depositing a gate electrode layer over a semiconductor substrate; patterning the gate electrode layer into a first gate electrode and a gate electrode extending portion; forming a first gate spacer alongside the first gate electrode; patterning the gate electrode extending portion into a second gate electrode after forming the first gate spacer; and forming a second gate spacer alongside the second gate electrode and a third gate spacer around the first spacer.

Abstract: A touch sensor having a visible area and a peripheral area at least on one side of the visible area includes a substrate, a touch electrode layer, and peripheral traces. The touch electrode layer is disposed on a surface of the substrate and includes touch electrodes corresponding to the visible area. The peripheral traces are disposed on the surface of the substrate and corresponding to the peripheral area. The peripheral traces are respectively electrically connected to the touch electrodes. Each of the peripheral traces includes a matrix and metal nanowires distributed in the matrix. A line width of each of the peripheral traces is more than or equal to 6 ?m and less than or equal to 12 ?m, and a line spacing of any adjacent peripheral traces of the peripheral traces is more than or equal to 6 ?m and less than or equal to 12 ?m.

Abstract: A touch sensor having a visible area and a peripheral area at least on one side of the visible area includes a substrate, a touch electrode layer, and peripheral traces. The touch electrode layer is disposed on a surface of the substrate and includes touch electrodes corresponding to the visible area. The peripheral traces are disposed on the surface of the substrate and corresponding to the peripheral area. The peripheral traces are respectively electrically connected to the touch electrodes. Each of the peripheral traces includes a matrix and metal nanowires distributed in the matrix. A line width of each of the peripheral traces is more than or equal to 6 ?m and less than or equal to 12 ?m, and a line spacing of any adjacent peripheral traces of the peripheral traces is more than or equal to 6 ?m and less than or equal to 12 ?m.

Abstract: A includes depositing a gate electrode layer over a semiconductor substrate; patterning the gate electrode layer into a first gate electrode and a gate electrode extending portion; forming a first gate spacer alongside the first gate electrode; patterning the gate electrode extending portion into a second gate electrode after forming the first gate spacer; and forming a second gate spacer alongside the second gate electrode and a third gate spacer around the first spacer.

Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip. The method includes forming a test line letter structure having one or more sidewalls continuously extending along a path that defines a shape of an alpha-numeric character from a top-view. The test line letter structure is formed by forming a first polysilicon structure over a substrate and forming a second polysilicon structure over the substrate at a location laterally separated from first polysilicon structure by a dielectric layer.

Abstract: Embodiments of the present invention provide a displaying method. The method includes steps of: displaying an element at a first position on touchscreen, obtaining touch information, determining an arrangement instruction which is obtained for the greatest number of times within predetermined time according to the touch information, and displaying the element at a second position on the touchscreen according to the arrangement instruction.

Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip. The method includes forming a test line letter structure having one or more sidewalls continuously extending along a path that defines a shape of an alpha-numeric character from a top-view. The test line letter structure is formed by forming a first polysilicon structure over a substrate and forming a second polysilicon structure over the substrate at a location laterally separated from first polysilicon structure by a dielectric layer.

Abstract: The present disclosure relates to a substrate having test line letters that are used to identify a test line on an integrated chip, while avoiding contamination of high-k metal gate processes, and a method of formation. In some embodiments, the substrate has a semiconductor substrate. A test line letter structure is arranged over the semiconductor substrate and has one or more trenches vertically extending between an upper surface of the test letter structure and a lower surface of the test line letter structure. The one or more trenches are arranged within the test line letter structure to form an opening in the upper surface of the test line structure that has a shape of an alpha-numeric character.

Abstract: The present disclosure relates to a substrate having test line letters that are used to identify a test line on an integrated chip, while avoiding contamination of high-k metal gate processes, and a method of formation. In some embodiments, an integrated chip is disclosed. The integrated chip has a semiconductor substrate. A test line letter is arranged over the semiconductor substrate. The test line letter comprises a positive relief that protrudes outward from the semiconductor substrate in the shape of an alpha-numeric character. One or more dummy structures are arranged over the semiconductor substrate. The one or more dummy structures are proximate to a boundary of the test line letter.

Abstract: The present disclosure relates to a substrate having test line letters that are used to identify a test line on an integrated chip, while avoiding contamination of high-k metal gate processes, and a method of formation. In some embodiments, an integrated chip is disclosed. The integrated chip has a semiconductor substrate. A test line letter is arranged over the semiconductor substrate. The test line letter comprises a positive relief that protrudes outward from the semiconductor substrate in the shape of an alpha-numeric character. One or more dummy structures are arranged over the semiconductor substrate. The one or more dummy structures are proximate to a boundary of the test line letter.