Patents by Inventor Fang Liang

Fang Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145641
    Abstract: A color conversion panel and a display device are provided. The color conversion panel includes an opaque substrate and a sapphire substrate. The opaque substrate includes a plurality of first pixel openings, a plurality of second pixel openings and a plurality of third pixel openings. The first pixel openings are filled with red quantum dot material, and the second pixel openings are filled with green quantum dot material. The sapphire substrate is on the opaque substrate. A first surface of the sapphire substrate that faces the opaque substrate has a plurality of first arc surfaces corresponding to the first pixel openings, a plurality of second arc surfaces corresponding to the second pixel openings, and a plurality of third arc surfaces corresponding to the third pixel openings.
    Type: Application
    Filed: December 15, 2022
    Publication date: May 2, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Kai-Ling Liang, Wei-Hung Kuo, Hui-Tang Shen, Chun-I Wu, Suh-Fang Lin
  • Publication number: 20240142671
    Abstract: An electronic device includes: a first substrate; a second substrate, disposed opposite to the first substrate; an insulating layer, disposed on a surface of the first substrate away from the second substrate; and a metal layer, disposed on a surface of the second substrate away from the first substrate, wherein a width of the insulating layer is different from a width of the metal layer.
    Type: Application
    Filed: January 3, 2024
    Publication date: May 2, 2024
    Inventors: Chi-Fang WU, Chin-Lung TING, I-Chang LIANG
  • Publication number: 20240121369
    Abstract: The present disclosure provides a screen detection method, an apparatus and a device, a computer program and a readable medium, and belongs to the technical field of screens. The method includes: receiving a cylindrical lens detection instruction for a target screen, wherein the cylindrical lens detection instruction at least includes target viewpoints; acquiring browsing images shot from the target screen under the target viewpoints in response to the detection instruction, wherein the target screen is a screen of which the light emission side is provided with cylindrical lenses; using the browsing images as viewpoint images under the condition that the browsing images include target contents; and outputting detection parameters of the cylindrical lenses on the target screen based on image parameters of the viewpoint images.
    Type: Application
    Filed: May 28, 2021
    Publication date: April 11, 2024
    Inventors: Jian GAO, Sen MA, Fang CHENG, Tao HONG, Jinye ZHU, Pengxia LIANG, Jing YU
  • Patent number: 11929260
    Abstract: Embodiments of methods and apparatus for reducing warpage of a substrate are provided herein. In some embodiments, a method for reducing warpage of a substrate includes: applying an epoxy mold over a plurality of dies on the substrate in a dispenser tool; placing the substrate on a pedestal in a curing chamber, wherein the substrate has an expected post-cure deflection in a first direction; inducing a curvature on the substrate in a direction opposite the first direction; and curing the substrate by heating the substrate in the curing chamber.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: March 12, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Fang Jie Lim, Chin Wei Tan, Jun-Liang Su, Felix Deng, Sai Kumar Kodumuri, Ananthkrishna Jupudi, Nuno Yen-Chu Chen
  • Publication number: 20230378266
    Abstract: A device comprise a first semiconductor channel layer over a substrate, a second semiconductor channel layer over the first semiconductor channel layer, and source/drain epitaxial structures on opposite sides of the first semiconductor channel layer and opposite sides of the second semiconductor channel layer. A compressive strain in the second semiconductor channel layer is greater than a compressive strain in the first semiconductor channel layer. The source/drain epitaxial structures each comprise a first region interfacing the first semiconductor channel layer and a second region interfacing the second semiconductor channel layer, and the first region has a composition different from a composition of the second region.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chung-En TSAI, Chia-Che CHUNG, Chee-Wee LIU, Fang-Liang LU, Yu-Shiang HUANG, Hung-Yu YEH, Chien-Te TU, Yi-Chun LIU
  • Publication number: 20230369487
    Abstract: A semiconductor device includes a first layer that includes a first semiconductor material disposed on a semiconductor substrate, and a second layer of a second semiconductor material disposed on the first layer. The semiconductor substrate includes Si. The first semiconductor material and the second semiconductor material are different. The second semiconductor material is formed of an alloy including a first element and Sn. A surface region of an end portion of the second layer at both ends of the second layer has a higher concentration of Sn than an internal region of the end portion of the second layer. The surface region surrounds the internal region.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 16, 2023
    Inventors: Fang-Liang LU, I-Hsieh Wong, Shih-Ya Lin, CheeWee Liu, Samuel C. Pan
  • Patent number: 11791410
    Abstract: A semiconductor device includes a first layer that includes a first semiconductor material disposed on a semiconductor substrate, and a second layer of a second semiconductor material disposed on the first layer. The semiconductor substrate includes Si. The first semiconductor material and the second semiconductor material are different. The second semiconductor material is formed of an alloy including a first element and Sn. A surface region of an end portion of the second layer at both ends of the second layer has a higher concentration of Sn than an internal region of the end portion of the second layer. The surface region surrounds the internal region.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: October 17, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fang-Liang Lu, I-Hsieh Wong, Shih-Ya Lin, CheeWee Liu, Samuel C. Pan
  • Patent number: 11776998
    Abstract: A device comprises a plurality of nanosheets, source/drain stressors, and a gate structure wrapping around the nanosheets. The nanosheets extend in a first direction above a semiconductor substrate and are arranged in a second direction substantially perpendicular to the first direction. The source/drain stressors are on either side of the nanosheets. Each of the source/drain stressors comprises a first epitaxial layer and a second epitaxial layer over the first epitaxial layer. The first and second epitaxial layers are made of a Group IV element and a Group V element. An atomic ratio of the Group V element to the Group IV element in the second epitaxial layer is greater than an atomic ratio of the Group V element to the Group IV element in the first epitaxial layer.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: October 3, 2023
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chung-En Tsai, Chia-Che Chung, Chee-Wee Liu, Fang-Liang Lu, Yu-Shiang Huang, Hung-Yu Yeh, Chien-Te Tu, Yi-Chun Liu
  • Patent number: 11645054
    Abstract: Techniques are provided for mapping natural language to code segments. In one embodiment, the techniques involve receiving a document and software code, wherein the document comprises a natural language description of a use of the code, generating, via a vectorization process performed on the document, at least one vector or word embedding, generating, via a natural language processing technique performed on the at least one vector or word embedding, a first label set, generating, via a machine learning analysis of the software code, a second label set, determining, based on a comparison of the first label set and the second label set, a match confidence between the document and the software code, wherein the match confidence indicates a measure of similarity between the first label set and the second label set, and upon determining that the match confidence exceeds a predefined threshold, mapping the document to the software code.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: May 9, 2023
    Assignee: International Business Machines Corporation
    Inventors: Zhong Fang Yuan, Bin Shang, Li Ni Zhang, Yong Fang Liang, Chen Gao, Tong Liu
  • Publication number: 20230074496
    Abstract: The present disclosure is directed to semiconductor structures with source/drain epitaxial stacks having a low-melting point top layer and a high-melting point bottom layer. For example, a semiconductor structure includes a gate structure disposed on a fin and a recess formed in a portion of the fin not covered by the gate structure. Further, the semiconductor structure includes a source/drain epitaxial stack disposed in the recess, where the source/drain epitaxial stack has bottom layer and a top layer with a higher activated dopant concentration than the bottom layer.
    Type: Application
    Filed: November 14, 2022
    Publication date: March 9, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Hsien TU, Chee-Wee LIU, Fang-Liang LU
  • Patent number: 11551992
    Abstract: A device includes plural semiconductor fins, a gate structure, an interlayer dielectric (ILD) layer, and an isolation dielectric. The gate structure is across the semiconductor fins. The ILD surrounds the gate structure. The isolation dielectric is at least between the semiconductor fins and has a thermal conductivity greater than a thermal conductivity of the ILD layer.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: January 10, 2023
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Jhih-Yang Yan, Fang-Liang Lu, Chee-Wee Liu
  • Publication number: 20220391183
    Abstract: Techniques are provided for mapping natural language to code segments. In one embodiment, the techniques involve receiving a document and software code, wherein the document comprises a natural language description of a use of the code, generating, via a vectorization process performed on the document, at least one vector or word embedding, generating, via a natural language processing technique performed on the at least one vector or word embedding, a first label set, generating, via a machine learning analysis of the software code, a second label set, determining, based on a comparison of the first label set and the second label set, a match confidence between the document and the software code, wherein the match confidence indicates a measure of similarity between the first label set and the second label set, and upon determining that the match confidence exceeds a predefined threshold, mapping the document to the software code.
    Type: Application
    Filed: June 3, 2021
    Publication date: December 8, 2022
    Inventors: Zhong Fang YUAN, Bin SHANG, Li Ni ZHANG, Yong Fang LIANG, Chen GAO, Tong LIU
  • Patent number: 11502197
    Abstract: The present disclosure is directed to semiconductor structures with source/drain epitaxial stacks having a low-melting point top layer and a high-melting point bottom layer. For example, a semiconductor structure includes a gate structure disposed on a fin and a recess formed in a portion of the fin not covered by the gate structure. Further, the semiconductor structure includes a source/drain epitaxial stack disposed in the recess, where the source/drain epitaxial stack has bottom layer and a top layer with a higher activated dopant concentration than the bottom layer.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: November 15, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Hsien Tu, Chee-Wee Liu, Fang-Liang Lu
  • Publication number: 20220324863
    Abstract: The present invention provides a compound of Formula (I) or a pharmaceutically acceptable salt thereof; a method for manufacturing the compounds of the invention, and its therapeutic uses. The present invention further provides a combination of pharmacologically active agents and a pharmaceutical composition.
    Type: Application
    Filed: May 13, 2022
    Publication date: October 13, 2022
    Inventors: Jan Jiricek, Isabelle K. Lerario, Fang Liang, Xiaodong Liu, Valentina Molteni, Advait Suresh Nagle, Shuyi Pearly NG, Maxim Ratnikov, Jeffrey M. Smith, Yongping Xie
  • Patent number: 11429472
    Abstract: A method, system, and computer program product for implementing automated cognitive software application error detection is provided. The method includes receiving data associated with model based self-learning software code. The annotated data is automatically divided with respect to specified categorization and grouping attributes and categorized groups comprising portions of the annotated data are generated and analyzed. At least one incorrect annotation associated a group of the categorized groups is detected and filtered. Likewise, a correct annotation for the group is detected and retrieved from a database. The correct annotation is appended to the group.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: August 30, 2022
    Assignee: International Business Machines Corporation
    Inventors: Zhong Fang Yuan, Tong Liu, Li Ni Zhang, Yong Fang Liang, Chen Gao
  • Patent number: 11384078
    Abstract: The present invention provides a compound of Formula (I) or a pharmaceutically acceptable salt thereof; (I) a method for manufacturing the compounds of the invention, and its therapeutic uses. The present invention further provides a combination of pharmacologically active agents and a pharmaceutical composition.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: July 12, 2022
    Assignee: Novartis AG
    Inventors: Jan Jiricek, Isabelle K. Lerario, Fang Liang, Xiaodong Liu, Valentina Molteni, Advait Suresh Nagle, Shuyi Pearly Ng, Maxim Ratnikov, Jeffrey M. Smith, Yongping Xie
  • Patent number: 11376682
    Abstract: A method and device for removing an electromagnetic core, the method including: using an electromagnet to magnetize or demagnetize a metallic upper nozzle when a magneto-conductive workpiece is cut off in a WEDM manner; attracting a core capable of being completely cut off and separated in the workpiece; utilizing the metallic upper nozzle to detect whether attracted; if the core is attracted, moving the core to a target area; demagnetizing and dropping the core in a trash area. The device is applied to a WEDM machine; after the metallic magneto-conductive upper nozzle is magnetized by the electromagnet, the upper nozzle is used to attract the magneto-conductive core; a metallic water spray cover is utilized to detect whether the core is attracted; the core is moved to the target area by a motion system of the WEDM machine, and dropped in a trash device after the upper nozzle is demagnetized.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: July 5, 2022
    Assignee: ACCUTEX TECHNOLOGIES CO., LTD.
    Inventors: Jui Fang Liang, Cheng Ying Lin
  • Patent number: 11374115
    Abstract: A method includes forming a first semiconductor layer over a substrate; forming a second semiconductor layer over the first semiconductor layer; forming a dummy gate structure over the second semiconductor layer; performing an etching process to form a recess in the first and second semiconductor layers; forming a epitaxy structure over in the recess, wherein the epitaxy structure is in contact with the first and second semiconductor layers; performing a solid phase diffusion process to form a doped region in the epitaxy structure, in which the doped region is in contact with the second semiconductor layer and is separated from the first semiconductor layer; and replacing the dummy gate structure with a metal gate structure.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: June 28, 2022
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chung-En Tsai, Fang-Liang Lu, Pin-Shiang Chen, Chee-Wee Liu
  • Publication number: 20220149172
    Abstract: A device comprises a plurality of nanosheets, source/drain stressors, and a gate structure wrapping around the nanosheets. The nanosheets extend in a first direction above a semiconductor substrate and are arranged in a second direction substantially perpendicular to the first direction. The source/drain stressors are on either side of the nanosheets. Each of the source/drain stressors comprises a first epitaxial layer and a second epitaxial layer over the first epitaxial layer. The first and second epitaxial layers are made of a Group IV element and a Group V element. An atomic ratio of the Group V element to the Group IV element in the second epitaxial layer is greater than an atomic ratio of the Group V element to the Group IV element in the first epitaxial layer.
    Type: Application
    Filed: January 24, 2022
    Publication date: May 12, 2022
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chung-En TSAI, Chia-Che CHUNG, Chee-Wee LIU, Fang-Liang LU, Yu-Shiang HUANG, Hung-Yu YEH, Chien-Te TU, Yi-Chun LIU
  • Patent number: D1024727
    Type: Grant
    Filed: December 7, 2023
    Date of Patent: April 30, 2024
    Assignee: Dongguan Lingdu Electronics Technology Co., Ltd
    Inventors: Xiuchun He, Shuhua Liang, Fang Peng