Abstract: The present disclosure provides, inter alia, methods for treating cancers including leukemia using low doses of an anthracycline such as doxorubicin.

Abstract: A method of manufacturing a phase change memory includes: (i) forming a first dielectric layer, a conductive contact and a first electrode over a semiconductor substrate; (ii) forming a second dielectric layer having an opening over the first dielectric layer, the opening exposing a top surface of the first electrode; (iii) forming a barrier layer lining a sidewall of the opening; (iv) forming a phase change element in the opening, wherein the phase change element includes a base and a peripheral wall extending upwards along the barrier layer from a periphery of the base, and an inner side of the peripheral wall defines a recess having an inlet and a bottom portion; (v) forming a heater filled in the recess; and (vi) forming a second electrode over the heater. A phase change memory is disclosed herein as well.

Abstract: A test key structure is provided. The test key structure comprises at least one semiconductor element. Each of the at least one semiconductor element including a well, a source region, a drain region and a gate. The source region is disposed in the well. The drain region is disposed in the well and separated from the source region. The gate is disposed above the well. The source region, the drain region and the well have the same type of doping.

Abstract: A method for forming a damascene opening, wherein the method comprises steps as follows: Firstly, a semiconductor structure comprising an inter-metal dielectric (IMD), a first hard mask layer and a second hard mask layer stacked in sequence is provided, wherein the semiconductor structure has at least one trench extending downwards from the second hard mask layer to the IMD. A plasma treatment is then performed to modify a portion of the first hard mask layer exposed from the trench. Subsequently, a wet treatment is performed to remove the second hard mask layer and a portion of the first hard mask layer, wherein the plasma-modified portion of the first patterned hard mask layer has a first removing rate substantially less than a second removing rate of the second hard mask layer in the wet treatment.

Abstract: In a process of forming a seed layer, particularly in a vertical trench or via, a semiconductor substrate having a dielectric structure and a hard mask structure thereon is provided. An opening is formed in the hard mask structure, and a trench or via is formed in the dielectric structure in communication with the opening, wherein an area of the opening is greater than that of an entrance of the trench or via. A seed layer is then deposited in the trench or via through the opening, and then subjected to a reflow process.