Patents by Inventor Fang-Yu Lin

Fang-Yu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973129
    Abstract: A method for forming a semiconductor device structure is provided. The semiconductor device includes forming nanowire structures stacked over a substrate and spaced apart from one another, and forming a dielectric material surrounding the nanowire structures. The dielectric material has a first nitrogen concentration. The method also includes treating the dielectric material to form a treated portion. The treated portion of the dielectric material has a second nitrogen concentration that is greater than the first nitrogen concentration. The method also includes removing the treating portion of the dielectric material, thereby remaining an untreated portion of the dielectric material as inner spacer layers; and forming the gate stack surrounding nanowire structures and between the inner spacer layers.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Han-Yu Lin, Chansyun David Yang, Fang-Wei Lee, Tze-Chung Lin, Li-Te Lin, Pinyen Lin
  • Publication number: 20240097011
    Abstract: A method includes forming a fin structure over a substrate, wherein the fin structure comprises first semiconductor layers and second semiconductor layers alternately stacked over a substrate; forming a dummy gate structure over the fin structure; removing a portion of the fin structure uncovered by the dummy gate structure; performing a selective etching process to laterally recess the first semiconductor layers, including injecting a hydrogen-containing gas from a first gas source of a processing tool to the first semiconductor layers and the second semiconductor layers; and injecting an F2 gas from a second gas source of the processing tool to the first semiconductor layers and the second semiconductor layers; forming inner spacers on opposite end surfaces of the laterally recessed first semiconductor layers of the fin structure; and replacing the dummy gate structure and the first semiconductor layers with a metal gate structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Han-Yu LIN, Fang-Wei LEE, Kai-Tak LAM, Raghunath PUTIKAM, Tzer-Min SHEN, Li-Te LIN, Pinyen LIN, Cheng-Tzu YANG, Tzu-Li LEE, Tze-Chung LIN
  • Publication number: 20240087945
    Abstract: Semiconductor processing apparatuses and methods are provided in which an electrostatic discharge (ESD) prevention layer is utilized to prevent or reduce ESD events from occurring between a semiconductor wafer and one or more components of the apparatuses. In some embodiments, a semiconductor processing apparatus includes a wafer handling structure that is configured to support a semiconductor wafer during processing of the semiconductor wafer. The apparatus further includes an ESD prevention layer on the wafer handling structure. The ESD prevention layer includes a first material and a second material, and the second material has an electrical conductivity that is greater than an electrical conductivity of the first material.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventors: Tsai-Hao HUNG, Ping-Cheng KO, Tzu-Yang LIN, Fang-Yu LIU, Cheng-Han WU
  • Publication number: 20240020698
    Abstract: Systems and methods for rule optimization are disclosed. In accordance with aspects, a method may include providing a segment rule, where the segment rule uses a machine learning model score associated with a data record and a scaler value to evaluate data records and the segment rule is configured to evaluate data records categorized into a corresponding segment of the segment rule by attributes of the data records; receiving, at the segment rule, a categorized set of data records, wherein each data record in the categorized set of data records is categorized in the corresponding segment of the segment rule based on attributes of the data records; iteratively evaluating, by the segment rule, each received data record with a range of scaler values, where the iteratively evaluating produces a plurality of outputs of the segment rule; and determining an optimal output from the plurality of outputs.
    Type: Application
    Filed: May 27, 2022
    Publication date: January 18, 2024
    Inventors: Mike HUGHES, Yea Kang YOON, Fang-Yu LIN, Ramana NALLAJARLA, Sambasiva R VADLAMUDI, Josh X JIANG, Hari SIVAPRASAD, Benedict HALL, Lifeng WANG
  • Publication number: 20230385836
    Abstract: Systems and methods for frequent machine learning model retraining and rule optimization are disclosed. In accordance with aspects, a method may include generating a challenger machine learning model based on a production machine learning model; training the challenger machine learning model on a plurality of datasets; scoring historical data with the challenger machine learning model, wherein the scoring produces a respective score for each record of a plurality of records in the historical data; determining that the challenger model performs within predetermined thresholds based on the scoring; selecting an optimal scaler value for a rule based on execution of the rule with a range of scaler values applied to the respective score for each record of the plurality of records evaluated by the rule; determining that the optimal scaler value outperforms a production scaler value; and promoting the challenger model and the optimal scaler value to a production environment.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Inventors: Mike HUGHES, Yea Kang YOON, Fang-Yu LIN, Ramana NALLAJARLA, Sambasiva R VADLAMUDI, Josh X JIANG, Hari SIVAPRASAD, Benedict HALL, Lifeng WANG
  • Publication number: 20230385835
    Abstract: Systems and methods for frequent machine learning model retraining and rule optimization are disclosed. In accordance with aspects, a method may include retrieving, from a data store, a plurality of datasets; generating a challenger machine learning model, wherein the challenger machine learning model is generated from a production machine learning model, and includes variables and variable weights included in the production machine learning model; training the challenger machine learning model with the plurality of datasets; adjusting the variable weights of the challenger machine learning model based on patterns in the plurality of datasets determined by the challenger machine learning model; performing a comparative analysis between the challenger model and the production model; and promoting the challenger model to a production environment based on the comparative analysis.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Inventors: Mike HUGHES, Yea Kang YOON, Fang-Yu LIN, Ramana NALLAJARLA, Sambasiva R. VADLAMUDI, Josh X. JIANG, Hari SIVAPRASAD, Benedict HALL, Lifeng WANG
  • Publication number: 20210030317
    Abstract: Disclosed in the present invention is an enzyme-free glucose detection chip for detecting blood sugar level of a blood in a neutral environment, including: a substrate; a detection portion, disposed on an end surface of the substrate; a plurality of protrusions, disposed at the detection portion; a conductive layer, disposed on a surface of the substrate having the protrusions; and a plurality of gold nanoparticles, dispersed on surfaces of the protrusions, wherein the characterized in that the conductive layer is made by mixing gold and platinum and the ratio (mol/v) of platinum to gold is 1:2 to 4:1.
    Type: Application
    Filed: September 25, 2020
    Publication date: February 4, 2021
    Inventors: GOU-JEN WANG, PO-YU PENG, FANG-YU LIN
  • Patent number: 10562027
    Abstract: An electrochemical extended-gate transistor (EET) system is provided, the system includes: a field effect transistor (FET), having a gate, a source, and a drain; a potentiostat, having a working electrode, a counter electrode, and a reference electrode; wherein the working electrode is coupled with a detection region, and the counter electrode is coupled with the gate; wherein the detection region, the gate, and the reference electrode are arranged in an ion fluid; wherein the potentiostat is configured to generate redox in the ion fluid by an electrochemical method to detect the target. A method for detecting targets are used to such system.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: February 18, 2020
    Assignee: Winnoz Technology, Inc.
    Inventors: Le-Chang Hsiung, Chun-Yen Tai, Yu-Lin Chen, Fang-Yu Lin, Chuan Whatt Eric Ou
  • Patent number: 10465056
    Abstract: The method for producing a transparent conductive substrate includes forming metal meshes on a flexible non-conductive substrate with high transmittance. It's unnecessary to use palladium as a catalyst in this method. The metal meshes are in the form of nano/micro wires and the conductive substrate has high transmittance of 80%-90% at visible light wavelengths of 390-750 nm.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: November 5, 2019
    Assignee: NATIONAL CHUNG HSING UNIVERSITY
    Inventors: Wei-Ping Dow, Po-Ting Chen, Liang-Jie Lin, Hung-Ming Chang, Ting-Yun Lin, Fang-Yu Lin
  • Publication number: 20190069251
    Abstract: A communications apparatus in a communications system includes a processor and a power scheme controller. The processor determines a predetermined adjustment offset for a zone according to a frame structure of the communications system. The power scheme controller is coupled to the processor, obtains information regarding the predetermined adjustment offset for the zone, determines a predetermined scaling factor for the zone, and determines a target frequency or a target voltage for the processor to operate in according to the predetermined adjustment offset and the predetermined scaling factor.
    Type: Application
    Filed: August 23, 2017
    Publication date: February 28, 2019
    Inventors: Chih-Yuan WANG, Hong-Ching CHEN, Chih-Yu CHANG, Chih-Jung YU, Fang-Yu LIN
  • Publication number: 20180340050
    Abstract: The method for producing a transparent conductive substrate includes forming metal meshes on a flexible non-conductive substrate with high transmittance. It's unnecessary to use palladium as a catalyst in this method. The metal meshes are in the form of nano/micro wires and the conductive substrate has high transmittance of 80%-90% at visible light wavelengths of 390-750 nm.
    Type: Application
    Filed: November 6, 2017
    Publication date: November 29, 2018
    Inventors: Wei-Ping Dow, Po-Ting Chen, Liang-Jie Lin, Hung-Ming Chang, Ting-Yun Lin, Fang-Yu Lin
  • Patent number: 10136848
    Abstract: A device for collecting a blood sample is provided. The device includes a collection unit, at least one capillary tube, a vacuum connector, and a storage unit. The collection unit has a top window for receiving the blood sample, a top surface, and a channel communicated with the top window. The at least one capillary tube is disposed in the collection unit and has a top end adjacent to the top window of the collection unit. The vacuum connector extends from the collection unit and communicates with the channel to provide a negative pressure by removing air in the channel. The storage unit is disposed under the collection unit for storing the blood sample.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: November 27, 2018
    Assignee: Winnoz Technology, Inc.
    Inventors: Le-Chang Hsiung, Fang-Yu Lin, Jui-Shuan Wu, Li-Tseng Ou, Po-Chun Chen, Chuan Whatt Eric Ou
  • Publication number: 20180255655
    Abstract: An electronic device with protected corners includes a main device body and a plurality of composite corner-pad structures. The main device body having an operation surface and an opposite back surface further includes a plurality of lateral sides, and two adjacent lateral sides are connected via a corner portion so as to make the main device body having a plurality of corner portions. Each the corner portion has a first corner-portion surface on the operation surface and a second corner-portion surface on the back surface. The plurality of composite corner-pad structures are individually and detachably mounted fixedly on the corresponding corner portions. Each of composite corner-pad structures includes a first corner pad and a second corner pad. The first corner pad covers at least part of the first corner-portion surface, and the second corner pad assembled to the first corner pad covers at least part of the second corner-portion surface.
    Type: Application
    Filed: March 28, 2017
    Publication date: September 6, 2018
    Inventors: Fang-Yu LIN, Bin-An HSIEH
  • Publication number: 20170332954
    Abstract: A device for collecting a blood sample is provided. The device includes a collection unit, at least one capillary tube, a vacuum connector, and a storage unit. The collection unit has a top window for receiving the blood sample, a top surface, and a channel communicated with the top window. The at least one capillary tube is disposed in the collection unit and has a top end adjacent to the top window of the collection unit. The vacuum connector extends from the collection unit and communicates with the channel to provide a negative pressure by removing air in the channel. The storage unit is disposed under the collection unit for storing the blood sample.
    Type: Application
    Filed: May 20, 2016
    Publication date: November 23, 2017
    Applicant: Winnoz Technology, Inc.
    Inventors: Le-Chang Hsiung, Fang-Yu Lin, Jui-Shuan Wu, Li-Tseng Ou, Po-Chun Chen, Chuan Whatt Eric Ou
  • Publication number: 20170154345
    Abstract: A calculating method of calculating multiple input data is disclosed. The calculating method includes the steps of dividing the input data into training data and testing data, inputting the training data into multiple mathematical models to perform calculation so as to obtain calculating results, comparing the calculating results with the testing data to obtain similarities and repeatedly adjusting parameter combinations of the mathematical models according to the similarities, and selecting one of the mathematical models according to the similarities and the parameter combinations.
    Type: Application
    Filed: February 4, 2016
    Publication date: June 1, 2017
    Inventors: Chun-Chang WANG, Fang-Yu LIN, Shih-Chang KUO
  • Publication number: 20160320332
    Abstract: An electrochemical extended-gate transistor (EET) system is provided, the system includes: a field effect transistor (FET), having a gate, a source, and a drain; a potentiostat, having a working electrode, a counter electrode, and a reference electrode; wherein the working electrode is coupled with a detection region, and the counter electrode is coupled with the gate; wherein the detection region, the gate, and the reference electrode are arranged in an ion fluid; wherein the potentiostat is configured to generate redox in the ion fluid by an electrochemical method to detect the target. A method for detecting targets are used to such system.
    Type: Application
    Filed: April 29, 2016
    Publication date: November 3, 2016
    Inventors: Le-Chang Hsiung, Chun-Yen Tai, Yu-Lin Chen, Fang-Yu Lin, Chuan Whatt Eric Ou
  • Publication number: 20150229236
    Abstract: The present invention provides a zero-bias capacitive micromachined ultrasonic transducer element, comprising: a substrate having a lower electrode formed therein; a membrane structure that structurally supports an upper electrode over the lower electrode, wherein the upper electrode has at least one protruding part thereunder; a cavity between the substrate and the membrane structure; and a polymeric material coated on an inner surface of the cavity. The fabrication method of the zero-bias capacitive micromachined ultrasonic transducer element is also provided.
    Type: Application
    Filed: July 21, 2014
    Publication date: August 13, 2015
    Inventors: Wei-Cheng Tian, Yu-Shan Tien, Fang-Yu Lin, Pai-Chi Li
  • Patent number: D805650
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: December 19, 2017
    Assignee: Winnoz Technology, Inc.
    Inventors: Le-Chang Hsiung, Jui-Shuan Wu, Po-Chun Chen, Yu-Lin Chen, Po-Yang Wang, Li-Tseng Ou, Fang-Yu Lin