Abstract: An aspect of the present invention is drawn to a device for use with an electrostatic chuck having a top surface and a bottom surface, the top surface being separated from the bottom surface by a width, the electrostatic chuck additionally having a hole therein, the hole having a first width at the top surface and having a second width at the bottom surface, the first width being less than the second width, the top surface being capable of having wafer disposed thereon. The device includes a pin, a shaft, a neck portion and an outer housing portion. The pin has a pin width less than the first width. The shaft has a pin-holding portion, an end portion and a central portion disposed between the pin-holding portion and the end portion. The central portion has a first bearing portion. The outer housing portion has a first end and a second end and includes a second bearing portion. The shaft is disposed within the outer housing portion and is moveable relative to the outer housing portion.

Abstract: An aspect of the present invention is drawn to a device for use with an electrostatic chuck having a top surface and a bottom surface, the top surface being separated from the bottom surface by a width, the electrostatic chuck additionally having a hole therein, the hole having a first width at the top surface and having a second width at the bottom surface, the first width being less than the second width, the top surface being capable of having wafer disposed thereon. The device includes a pin, a shaft, a neck portion and an outer housing portion. The pin has a pin width less than the first width. The shaft has a pin-holding portion, an end portion and a central portion disposed between the pin-holding portion and the end portion. The central portion has a first bearing portion. The outer housing portion has a first end and a second end and includes a second bearing portion. The shaft is disposed within the outer housing portion and is moveable relative to the outer housing portion.

Abstract: A port provides access to a process chamber interior for exemplary gas injection and process analysis and measurement. Centering the port in an external RF coil reduces the strength of an electric field across the port in generating plasma in the chamber. Plasma-induced etching and deposition in a bore of a gas injection injector mounted in the port is reduced by a grounded shield surrounding a region defined by the port, extending the life of the injector and of a chamber window in which the port is provided. The shield surrounds the region, and is configured with a longitudinally-extending slot defining a retainer arm and a flexure junction, and with a retainer foot on the arm. The junction urges the arm to extend the foot into a retainer groove of the port, and flexes to permit foot movement out of the groove in removal of the shield from the port.

Abstract: The invention relates to a fluid connector for sealing an interface between first and second fluid passages in a plasma processing apparatus. The fluid connector includes a first end member having a first geometry. The first geometry is arranged to substantially seal a first mating region of the first fluid passage. The fluid connector further includes a second end member having a second geometry. The second geometry is arranged to substantially seal a second mating region of the second fluid passage and the second geometry is configured differently than the first geometry. The fluid connector additionally includes an opening that extends through the first end member and the second end member through which a fluid may pass for use by the, semiconductor processing apparatus so as to fluidly couple the first fluid passage to the second fluid passage.

Abstract: The present invention is directed to a plasma processor, and more specifically, to an apparatus to reduce or eliminate plasma lighting inside a gas line in a strong RF field in the plasma processor. More particularly, the present invention uses shielding and gas flow restricting to reduce or eliminate plasma lighting in a gas line used to deliver gas to cool the work piece in the plasma processor.

Abstract: A pin stop and method of implementation suitable for use lift pin assemblies used in semiconductor process environments is provided. The pin stop includes a pin shaft and a circular pin head with soft stop and hard stop features defined thereon. The soft stop feature is defined in a grove in the pin head surface and is configured to impact a stopping surface slowing movement of a lift pin assembly. The hard stop then impacts the stopping surface providing a constant, reliable and repeatable position of a wafer positioned on the lift pin assembly.

Abstract: The present invention is directed to a plasma processor, and more specifically, to an apparatus to reduce or eliminate plasma lighting inside a gas line in a strong RF field in the plasma processor. More particularly, the present invention uses shielding and gas flow restricting to reduce or eliminate plasma lighting in a gas line used to deliver gas to cool the work piece in the plasma processor.

Abstract: The invention relates to a fluid connector for sealing an interface between first and second fluid passages in a plasma processing apparatus. The fluid connector includes a first end member having a first geometry. The first geometry is arranged to substantially seal a first mating region of the first fluid passage. The fluid connector further includes a second end member having a second geometry. The second geometry is arranged to substantially seal a second mating region of the second fluid passage and the second geometry is configured differently than the first geometry. The fluid connector additionally includes an opening that extends through the first end member and the second end member through which a fluid may pass for use by the semiconductor processing apparatus so as to fluidly couple the first fluid passage to the second fluid passage.

Abstract: A method and apparatus for compensating non-uniform wafer processing in a plasma processing chamber. The plasma processing chamber has an electrostatic chuck for clamping a wafer. The electrostatic chuck has one or more layers. A first wafer is processed on an electrostatic chuck in a first plasma processing chamber by exposing the first wafer to a plasma. Then, non-uniformity characteristics of the processed first wafer are determined. Based on the non-uniformity characteristics, one or more layers of the electrostatic chuck are configured to substantially compensate for the non-uniformity characteristics. A second wafer is then processed on the configured electrostatic chuck to produce substantially uniform process results.