Abstract: A transceiver system is disclosed for use in a telecommunication system. The transceiver system includes a transmission circuit including a transmitter input coupled to an input of a transmission amplifier, a receiver circuit including a receiver output coupled to an output of a receiver amplifier, and a transmission line interface circuit that is coupled to an output of the transmission amplifier and to an input of the receiver amplifier. The transmission line interface circuit includes a matching impedance that is directly coupled to a feedback path of the transmission amplifier and that terminates the transmission line of the transceiver system.

Abstract: A transceiver system is disclosed for use in a telecommunication system. The transceiver system includes a transmission circuit with a differential transmitter input coupled via a transmitter input stage to a differential input of a transmission amplifier in an embodiment. The transmitter input stage includes a trimmable resistor, one end of which is coupled to a positive transmit input signal, and the other end of which is coupled to a negative transmit input signal. The transceiver system also includes a receiver circuit with a differential receiver output coupled to a differential input of a receiver amplifier, and further includes a transmission line interface circuit coupled to a differential output of said transmission amplifier and to a differential input of said receiver amplifier. In accordance with other embodiments, the receiver amplifier includes an input stage that includes a first plurality of capacitors and a feedback circuit that includes a second plurality of capacitors.

Abstract: A circuit for matching a first mirror transistor with a second mirror transistor in a current mirror includes a bias transistor and a diode connected transistor to match such mirror transistors. More particularly, the circuit is a part of an amplifier having an output with a quiescent voltage and at least one rail voltage. The first mirror transistor has a first terminal coupled to the output and a second terminal coupled to the at least one rail voltage. To effectuate its mirroring function, the bias transistor is coupled to a first terminal of the second mirror transistor, and the diode connected transistor is coupled to both a second terminal of the second mirror transistor and the at least one rail voltage. The bias transistor has a terminal with a quiescent voltage that is substantially equal to the quiescent voltage of the output.

Abstract: A hybrid matching system is disclosed for use with a transmitter and receiver. The hybrid matching system includes a pair of transmitter output nodes, a pair of receiver input nodes, and a pair of terminals for interfacing to a transmission line. The system further includes a first impedance bridge portion including at least one inductor for coupling to the transmission line terminals via at least one transformer winding, and a second impedance bridge portion interposed between the pair of transmitter output nodes and the first impedance bridge portion, and interposed between the pair of receiver input nodes and the first impedance bridge portion.

Abstract: The invention provides a power amplifier system including a plurality of amplifiers, a plurality of primary transformer windings, a single secondary transformer winding. Each of the plurality of amplifiers includes a differential input that is commonly coupled to a system input port, and each the plurality of amplifiers also includes a differential output. Each of the plurality of primary transformer windings is coupled to the differential output of one of the plurality of amplifiers. The single secondary transformer winding is inductively coupled to all of the primary transformer windings and provides a system output port to which a load may be coupled.

Abstract: A circuit for matching a first mirror transistor with a second mirror transistor in a current mirror includes a bias transistor and a diode connected transistor to match such mirror transistors. More particularly, the circuit is a part of an amplifier having an output with a quiescent voltage and at least one rail voltage. The first mirror transistor has a first terminal coupled to the output and a second terminal coupled to the at least one rail voltage. To effectuate its mirroring function, the bias transistor is coupled to a first terminal of the second mirror transistor, and the diode connected transistor is coupled to both a second terminal of the second mirror transistor and the at least one rail voltage. The bias transistor has a terminal with a quiescent voltage that is substantially equal to the quiescent voltage of the output.

Abstract: A transceiver system is disclosed for use in a telecommunication system. The transceiver system includes a transmission circuit including a differential transmitter input coupled to a differential input of a transmission amplifier, a receiver circuit including a differential receiver output coupled to a differential output of a receiver amplifier, and a transmission line interface circuit that is coupled to a differential output of the transmission amplifier and to a differential input of the receiver amplifier. The transmission line interface circuit providing a second order high pass transfer function.

Abstract: Self-calibration methods and structures are provided for pipelined ADCs which can be realized without requiring external measuring instruments or calibrators, without requiring major changes in pipeline structure and which can be rapidly obtained with stored calibration processes. In method embodiments, each of selected converter stages are calibrated by using succeeding stages as sub-ADCs which measure gain error at a transition step in a selected stage's residue transfer characteristic and saves the gain error as a calibration constant Ccal for that stage. After a first calibration constant Ccal has been obtained, the process is successively repeated for preceding converter stages except that previously-obtained calibration constants are multiplied by their respective stage's digital input signals Din to obtain weighted calibration constants Ccalwtd which are included in measured gain errors to thereby obtain preceding calibration constants Ccal.

Abstract: A transceiver system is disclosed for use in a telecommunication system. The transceiver system includes a transmission circuit including a transmitter input coupled to an input of a transmission amplifier, a receiver circuit including a receiver output coupled to an output of a receiver amplifier, and a transmission line interface circuit that is coupled to an output of the transmission amplifier and to an input of the receiver amplifier. The transmission line interface circuit includes a matching impedance that is directly coupled to a feedback path of the transmission amplifier and that terminates the transmission line of the transceiver system.

Abstract: An electrical network creates a differential voltage signal and comprises a plurality of first impedance elements of substantially equal values which are connected to form an impedance bridge. The impedance of at least one of the first impedance elements changes in response to at least one selected external condition to which the first impedance elements are exposed. The network also comprises a second impedance element which has two nodes. The second impedance element is connected at these nodes between a first pair of the first impedance elements. The differential voltages are measured between these nodes and between another node or nodes with magnitudes and signs being dependent upon the change in the impedance of the first impedance elements.

Abstract: An electrical network creates a differential voltage signal and comprises a plurality of first impedance elements of substantially equal values which are connected to form an impedance bridge. The impedance of at least one of the first impedance elements changes in response to at least one selected external condition to which the first impedance elements are exposed. The network also comprises a second impedance element which has two nodes. The second impedance element is connected at these nodes between a first pair of the first impedance elements. The differential voltages are measured between these nodes and between another node or nodes with magnitudes and signs being dependent upon the change in the impedance of the first impedance elements.