Patents by Inventor Fariborz Nadi

Fariborz Nadi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230385839
    Abstract: Systems and methods for reducing false positives for financial transaction fraud monitoring using machine learning techniques. Using an original model for separating transactions into high risk and low risk categories for fraud, transactions falling into the high-risk category may be labeled as a false positive or a true positive. The labels and data associated with the transactions may be used to train two or more false positive reduction models (FPRMs) using iterative machine learning techniques. Once training is complete, a future transaction may be processed using the original model, and, if the original model indicates that the future transaction is high risk, data associated with the future transaction may be processed by the trained FPRM(s), which may determine whether the future transaction is at a high risk or a low risk of being fraudulent.
    Type: Application
    Filed: May 31, 2022
    Publication date: November 30, 2023
    Applicant: Mastercard International Incorporated
    Inventors: Fariborz Nadi, Jose Qiu Chou, Yuanzheng Du
  • Publication number: 20220022038
    Abstract: A computer-implemented method for authenticating an individual to one or more IoT devices. The method may include: receiving active behavioral data from the personal electronic device; retrieving an active behavioral profile corresponding to the individual; comparing the active behavioral data with the active behavioral profile; and authenticating the individual based at least in part on the comparison.
    Type: Application
    Filed: July 16, 2021
    Publication date: January 20, 2022
    Applicant: Mastercard International Incorporated
    Inventors: Fariborz Nadi, Timothy B. McBride, Akanksha Mehra, Victor Hom, Beth Marie Griffin
  • Patent number: 6433473
    Abstract: A structure and method for forming an column electrode for a field emission display device wherein the column electrode is disposed beneath the field emitters and the row electrode. In one embodiment, the present invention comprises depositing a resistor layer over portions of a column electrode. Next, an inter-metal dielectric layer is deposited over the column electrode. In the present embodiment, the inter-metal dielectric layer is deposited over portions of the resistor layer and over pad areas of the column electrode. After the deposition of the inter-metal dielectric layer, the column electrode is subjected to an anodization process such that exposed regions of the column electrode are anodized. In so doing, the present invention provides a column electrode structure which is resistant to column to row electrode shorts and which is protected from subsequent processing steps.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: August 13, 2002
    Assignee: Candescent Intellectual Property Services, Inc.
    Inventors: Kishore K. Chakravorty, Fariborz Nadi, Christopher J. Spindt, Ronald L. Hansen, Colin D. Stanners