Patents by Inventor Fariboz Assaderaghi

Fariboz Assaderaghi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9802815
    Abstract: A method for fabricating a MEMS device includes depositing and patterning a first sacrificial layer onto a silicon substrate, the first sacrificial layer being partially removed leaving a first remaining oxide. Further, the method includes depositing a conductive structure layer onto the silicon substrate, the conductive structure layer making physical contact with at least a portion of the silicon substrate. Further, a second sacrificial layer is formed on top of the conductive structure layer. Patterning and etching of the silicon substrate is performed stopping at the second sacrificial layer. Additionally, the MEMS substrate is bonded to a CMOS wafer, the CMOS wafer having formed thereupon a metal layer. An electrical connection is formed between the MEMS substrate and the metal layer.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: October 31, 2017
    Assignee: INVENSENSE, INC.
    Inventors: Michael Julian Daneman, Mei-Lin Chan, Martin Lim, Fariboz Assaderaghi, Erhan Polatkan Ata
  • Publication number: 20160083247
    Abstract: A method for fabricating a MEMS device includes depositing and patterning a first sacrificial layer onto a silicon substrate, the first sacrificial layer being partially removed leaving a first remaining oxide. Further, the method includes depositing a conductive structure layer onto the silicon substrate, the conductive structure layer making physical contact with at least a portion of the silicon substrate. Further, a second sacrificial layer is formed on top of the conductive structure layer. Patterning and etching of the silicon substrate is performed stopping at the second sacrificial layer. Additionally, the MEMS substrate is bonded to a CMOS wafer, the CMOS wafer having formed thereupon a metal layer. An electrical connection is formed between the MEMS substrate and the metal layer.
    Type: Application
    Filed: December 2, 2015
    Publication date: March 24, 2016
    Inventors: Michael Julian Daneman, Mei-Lin Chan, Martin Lim, Fariboz Assaderaghi, Erhan Polatkan Ata
  • Patent number: 9227842
    Abstract: A method for fabricating a MEMS device includes depositing and patterning a first sacrificial layer onto a silicon substrate, the first sacrificial layer being partially removed leaving a first remaining oxide. Further, the method includes depositing a conductive structure layer onto the silicon substrate, the conductive structure layer making physical contact with at least a portion of the silicon substrate. Further, a second sacrificial layer is formed on top of the conductive structure layer. Patterning and etching of the silicon substrate is performed stopping at the second sacrificial layer. Additionally, the MEMS substrate is bonded to a CMOS wafer, the CMOS wafer having formed thereupon a metal layer. An electrical connection is formed between the MEMS substrate and the metal layer.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: January 5, 2016
    Assignee: INVENSENSE, INC.
    Inventors: Michael Julian Daneman, Mei-Lin Chan, Martin Lim, Fariboz Assaderaghi, Erhan Polatkan Ata
  • Publication number: 20140239353
    Abstract: A method for fabricating a MEMS device includes depositing and patterning a first sacrificial layer onto a silicon substrate, the first sacrificial layer being partially removed leaving a first remaining oxide. Further, the method includes depositing a conductive structure layer onto the silicon substrate, the conductive structure layer making physical contact with at least a portion of the silicon substrate. Further, a second sacrificial layer is formed on top of the conductive structure layer. Patterning and etching of the silicon substrate is performed stopping at the second sacrificial layer. Additionally, the MEMS substrate is bonded to a CMOS wafer, the CMOS wafer having formed thereupon a metal layer. An electrical connection is formed between the MEMS substrate and the metal layer.
    Type: Application
    Filed: November 19, 2013
    Publication date: August 28, 2014
    Applicant: Invensense, Inc.
    Inventors: Michael Julian Daneman, Mei-Lin Chan, Martin Lim, Fariboz Assaderaghi, Erhan Polatkan Ata