Patents by Inventor Farid El Gabaly

Farid El Gabaly has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10429343
    Abstract: Various technologies pertaining to a transistor having a variable-conductance channel with a non-volatile tunable conductance are described herein. The transistor comprises source and drain electrodes separated by a conducting channel layer. The conducting channel layer is separated from an electrochemical gate (ECG) layer by an electrolyte layer that prevents migration of electrons between the channel and the ECG but allows ion migration. When a voltage is applied between the channel and the ECG, electrons flow from one to the other, which causes a migration of ions from the channel to the ECG or vice versa. As ions move into or out of the channel layer, the conductance of the channel changes. When the voltage is removed, the channel maintains its conductance state.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: October 1, 2019
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Albert Alec Talin, Farid El Gabaly Marquez, Elliot James Fuller, Sapan Agarwal
  • Patent number: 9947379
    Abstract: Devices and methods for non-volatile analog data storage are described herein. In an exemplary embodiment, an analog memory device comprises a potential-carrier source layer, a barrier layer deposited on the source layer, and at least two storage layers deposited on the barrier layer. The memory device can be prepared to write and read data via application of a biasing voltage between the source layer and the storage layers, wherein the biasing voltage causes potential-carriers to migrate into the storage layers. After initialization, data can be written to the memory device by application of a voltage pulse between two storage layers that causes potential-carriers to migrate from one storage layer to another. A difference in concentration of potential carriers caused by migration of potential-carriers between the storage layers results in a voltage that can be measured in order to read the written data.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: April 17, 2018
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Farid El Gabaly Marquez, Albert Alec Talin
  • Patent number: 8398872
    Abstract: A novel method of forming large atomically flat areas is described in which a crystalline substrate having a stepped surface is exposed to a vapor of another material to deposit a material onto the substrate, which material under appropriate conditions self arranges to form 3D islands across the substrate surface. These islands are atomically flat at their top surface, and conform to the stepped surface of the substrate below at the island-substrate interface. Thereafter, the deposited materials are etched away, in the etch process the atomically flat surface areas of the islands transferred to the underlying substrate. Thereafter the substrate may be cleaned and annealed to remove any remaining unwanted contaminants, and eliminate any residual defects that may have remained in the substrate surface as a result of pre-existing imperfections of the substrate.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: March 19, 2013
    Assignee: The Regents of the University of California
    Inventors: Farid El Gabaly, Andreas K. Schmid
  • Publication number: 20110042351
    Abstract: A novel method of forming large atomically flat areas is described in which a crystalline substrate having a stepped surface is exposed to a vapor of another material to deposit a material onto the substrate, which material under appropriate conditions self arranges to form 3D islands across the substrate surface. These islands are atomically flat at their top surface, and conform to the stepped surface of the substrate below at the island-substrate interface. Thereafter, the deposited materials are etched away, in the etch process the atomically flat surface areas of the islands transferred to the underlying substrate. Thereafter the substrate may be cleaned and annealed to remove any remaining unwanted contaminants, and eliminate any residual defects that may have remained in the substrate surface as a result of pre-existing imperfections of the substrate.
    Type: Application
    Filed: March 10, 2009
    Publication date: February 24, 2011
    Applicant: ENERGY, UNITED STATES DEPARTMENT OF
    Inventors: Farid El Gabaly, Andreas K. Schmid