Patents by Inventor Farley Lai

Farley Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200143211
    Abstract: A method is provided for determining entailment between an input premise and an input hypothesis of different modalities. The method includes extracting features from the input hypothesis and an entirety of and regions of interest in the input premise. The method further includes deriving intra-modal relevant information while suppressing intra-modal irrelevant information, based on intra-modal interactions between elementary ones of the features of the input hypothesis and between elementary ones of the features of the input premise. The method also includes attaching cross-modal relevant information to the features from the input premise to the features from the input hypothesis to form a cross-modal representation, based on cross-modal interactions between pairs of different elementary features from different modalities.
    Type: Application
    Filed: October 30, 2019
    Publication date: May 7, 2020
    Inventors: Farley Lai, Asim Kadav, Ning Xie
  • Publication number: 20190304079
    Abstract: Methods and systems for detecting and correcting anomalous inputs include training a neural network to embed high-dimensional input data into a low-dimensional space with an embedding that preserves neighbor relationships. Input data items are embedded into the low-dimensional space to form respective low-dimensional codes. An anomaly is determined among the high-dimensional input data based on the low-dimensional codes. The anomaly is corrected.
    Type: Application
    Filed: April 1, 2019
    Publication date: October 3, 2019
    Inventors: Renqiang Min, Farley Lai, Eric Cosatto, Hans Peter Graf
  • Publication number: 20190244337
    Abstract: A false alarm reduction system is provided that includes a processor cropping each input image at randomly chosen positions to form cropped images of a same size at different scales in different contexts. The system further includes a CONDA-GMM, having a first and a second conditional deep autoencoder for respectively (i) taking each cropped image without a respective center block as input for measuring a discrepancy between a reconstructed and a target center block, and (ii) taking an entirety of cropped images with the target center block. The CONDA-GMM constructs density estimates based on reconstruction error features and low-dimensional embedding representations derived from image encodings. The processor determines an anomaly existence based on a prediction of a likelihood of the anomaly existing in a framework of a CGMM, given the context being a representation of the cropped image with the center block removed and having a discrepancy above a threshold.
    Type: Application
    Filed: January 16, 2019
    Publication date: August 8, 2019
    Inventors: Alexandru Niculescu-Mizil, Renqiang Min, Eric Cosatto, Farley Lai, Hans Peter Graf, Xavier Fontaine
  • Publication number: 20190244513
    Abstract: A false alarm reduction system and method are provided for reducing false alarms in an automatic defect detection system. The false alarm reduction system includes a defect detection system, generating a list of image boxes marking detected potential defects in an input image. The false alarm reduction system further includes a feature extractor, transforming each of the image boxes in the list into a respective set of numerical features. The false alarm reduction system also includes a classifier, computing as a classification outcome for the each of the image boxes whether the detected potential defect is a true defect or a false alarm responsive to the respective set of numerical features for each of the image boxes.
    Type: Application
    Filed: January 16, 2019
    Publication date: August 8, 2019
    Inventors: Alexandru Niculescu-Mizil, Renqiang Min, Eric Cosatto, Farley Lai, Hans Peter Graf, Xavier Fontaine
  • Publication number: 20180060731
    Abstract: A computer-implemented method is provided for neural network training. The method includes improving a cache utilization by one or more processors during multiple training stages of a neural network, by performing a stage-wise mini-batch process on a set of samples used for the multiple training stages. The stage-wise mini-batch process waits for each of the multiple training stages to complete using a system wait primitive to improve the cache utilization.
    Type: Application
    Filed: August 16, 2017
    Publication date: March 1, 2018
    Inventors: Asim Kadav, Farley Lai
  • Publication number: 20180060240
    Abstract: A face recognition system and method for face recognition are provided. The face recognition system includes a camera for capturing an input image of a face of a person to be recognized. The face recognition system further includes a cache. The face recognition system further includes a set of one or more processors configured to (i) improve a utilization of the cache by the one or more processors during multiple training stages of a neural network configured to perform face recognition, by performing a stage-wise mini-batch process on a set of samples used for the multiple training stages, and (ii) recognize the person by applying the neural network to the input image during a recognition stage. The stage-wise mini-batch process waits for each of the multiple training stages to complete using a system wait primitive to improve the utilization of the cache.
    Type: Application
    Filed: August 16, 2017
    Publication date: March 1, 2018
    Inventors: Asim Kadav, Farley Lai