Patents by Inventor Farn Wang

Farn Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11846972
    Abstract: A method and an apparatus for generating software test reports are provided. The method includes following steps: providing a testing platform that supports retrieving one or more documents such as screenshots or DOM-like documents related to screen content of an application under test (AuT) and analyzing the documents to obtain description data of the screen content; selecting to execute a test report generator, and querying the description data, multiple test scripts ever executed on a system under test (SuT) and multiple test actionables from the testing platform by the test report generator, so as to evaluate a test trace of the AuT, calculate at least one test actionable and test data adapted for the AuT, and return the calculated test actionable to the testing platform; and executing the test actionable on the AuT in the SuT by the testing platform, so as to generate test reports of the AuT.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: December 19, 2023
    Assignee: National Taiwan University
    Inventor: Farn Wang
  • Publication number: 20220334959
    Abstract: A method and an apparatus for generating software test reports are provided. The method includes following steps: providing a testing platform that supports retrieving one or more documents such as screenshots or DOM-like documents related to screen content of an application under test (AuT) and analyzing the documents to obtain description data of the screen content; selecting to execute a test report generator, and querying the description data, multiple test scripts ever executed on a system under test (SuT) and multiple test actionables from the testing platform by the test report generator, so as to evaluate a test trace of the AuT, calculate at least one test actionable and test data adapted for the AuT, and return the calculated test actionable to the testing platform; and executing the test actionable on the AuT in the SuT by the testing platform, so as to generate test reports of the AuT.
    Type: Application
    Filed: April 11, 2022
    Publication date: October 20, 2022
    Applicant: National Taiwan University
    Inventor: Farn Wang
  • Publication number: 20140001741
    Abstract: A document binder for bonding one or more books includes a cover, a holding base, a first holding member, a second holding member and at least one rod. The cover has a front cover, a back cover and a back board disposed between the front and back covers. The back board has a base plate pivotally connecting the front and back covers. The holding base is secured on the base plate and immobile. The first and second holding members are secured on the opposite end of the holding base and projecting there-from. The rods go through the spine portion of the books and the two ends thereof are arranged in the holding members.
    Type: Application
    Filed: February 8, 2013
    Publication date: January 2, 2014
    Inventor: FARN WANG
  • Publication number: 20100131920
    Abstract: The invention provides a parametric EDA function tool and a method of simplifying EDA programming language, characterized by using an EDA language unit to convert the programming language into a parametric EDA language mode having format strings and variable length arguments; using a function formation unit to form EDA function codes from the parametric EDA language; and using an executive file generator to compile the EDA function codes into an executive file to be executed by a verification device, thereby overcoming the drawbacks of having vast and inflexible EDA programming language that occupies large memory spaces and thus the increased costs for verification as encountered in prior techniques.
    Type: Application
    Filed: June 27, 2009
    Publication date: May 27, 2010
    Applicant: National Taiwan University
    Inventor: Farn Wang
  • Publication number: 20080148236
    Abstract: A test device, connecting to a test case database, derives a qualified test case plan from the test case database, a method and a computer readable medium are disclosed. The test device comprises a rule module, a selection module, and a modulation module. The rule module is adapted to setting a plurality of test rules. The selection module is adapted to selecting a proper test case meeting the requirement of a particular test rule, and to selecting proper test case for every test rule. The selection module is also adapted to building a binary decision diagram of the proper test cases. The modulation module is adapted to deriving the qualified test case plan corresponding to the binary decision diagram, wherein the qualified test case plan comprises at least one proper test case.
    Type: Application
    Filed: March 6, 2007
    Publication date: June 19, 2008
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Wei-Jui Huang, Chiu-Han Hsiao, Farn Wang
  • Publication number: 20060101331
    Abstract: A method for automated test-case generation. A first type SDL is translated to a second type SDL in accordance with translation rules. The second type SDL is analyzed using a coverage analysis algorithm for calculating the coverage of the second type SDL, and test cases corresponding to the second type SDL are generated according to the coverage. Test cases complying with tree and tabular combined notation (TTCN) formats are generated according to a tree structure corresponding to the second type SDL and TTCNs.
    Type: Application
    Filed: January 13, 2005
    Publication date: May 11, 2006
    Inventors: Farn Wang, Jian-Ming Wang, An-Yi Chen, Chiu-Han Hsiao
  • Patent number: 6665845
    Abstract: A tool for computing noise coupled onto victim lines from aggressor lines of an integrated circuit has code for traversing a victim line of the integrated circuit layout to measure its length, its average width, a coupling length, and a harmonic mean of spacing between the victim line and aggressor lines. The tool has code for computing a resistance, estimated coupling capacitance, and total capacitance of the victim line from these parameters.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Kathirqamar Aingaran, Stephan Hoerold, Manjunath Haritsa, Farn Wang