Patents by Inventor Farouk Smith

Farouk Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240315733
    Abstract: The invention provides a system for performing distraction osteogenesis of a hand or other anatomical extremity. The system includes a proximal bone fixture component configured to engage a proximal portion of a bone segment, and a movable distractor component which can be positioned distal of the proximal bone fixture component and which is configured to engage a region of the hand located distal of the bone portion engaged by the bone fixture component. Drive means are provided for applying a distraction force between the bone fixture component and the distractor component, and a control component is provided to control operation of the drive means automatically. The drive means can be operated in a continuous manner. A user interface module is provided and can be separated from the control component after the system's operating parameters have been set. The invention also provides a method of performing distraction osteogenesis automatically.
    Type: Application
    Filed: July 15, 2022
    Publication date: September 26, 2024
    Inventors: Shahrokh Hatefi, Farouk Smith, Khaled Abou-el-Hossein
  • Publication number: 20190020341
    Abstract: A circuit structure and a method for supressing single event transients (SETs) or glitches in digital electronic circuits are provided. The circuit includes a first input which receives an output of a digital electronic circuit and a second input which receives a redundant or duplicated output of the digital electronic circuit. The circuit includes only four two-input gates of two different kinds selected from AND, OR, NAND and NOR gates. The four two-input gates being arranged so that a final circuit output is impervious to a change in a logic level of only the first input or only the second input, and the final circuit output is equivalent to the logic level of the first and second inputs when the logic level of the first and second inputs match.
    Type: Application
    Filed: September 11, 2017
    Publication date: January 17, 2019
    Applicants: Nelson Mandela University, Nelson Mandela University
    Inventor: Farouk Smith
  • Patent number: 8975913
    Abstract: A circuit structure (200) for suppressing single event transients (SETs) or glitches in digital electronic circuits is provided. The circuit structure includes a first input (100) which receives an output of a digital electronic circuit (A), a second input (100?) which receives a redundant or duplicated output of the digital electronic circuit (A?), and two sub-circuits (102, 106) that each receive the inputs and have one output. One of the sub-circuits is insensitive to a change in the value of one of its inputs when the inputs are in a first logic state and the other sub-circuit is insensitive to a change in the value of one of the inputs when the inputs are in a second, inverted logic state. The sub-circuit outputs are input into a two-input multiplexer (202) which has its output (204) connected to its selection port (SEL), and the sub-circuits are arranged so that the sub-circuit which is insensitive to a change in the value of one of its inputs is selected whenever the output of the multiplexer changes.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: March 10, 2015
    Assignee: Nelson Mandela Metropolitan University
    Inventor: Farouk Smith
  • Publication number: 20140247068
    Abstract: A circuit structure (200) for suppressing single event transients (SETs) or glitches in digital electronic circuits is provided. The circuit structure includes a first input (100) which receives an output of a digital electronic circuit (A), a second input (100?) which receives a redundant or duplicated output of the digital electronic circuit (A?), and two sub-circuits (102, 106) that each receive the inputs and have one output. One of the sub-circuits is insensitive to a change in the value of one of its inputs when the inputs are in a first logic state and the other sub-circuit is insensitive to a change in the value of one of the inputs when the inputs are in a second, inverted logic state. The sub-circuit outputs are input into a two-input multiplexer (202) which has its output (204) connected to its selection port (SEL), and the sub-circuits are arranged so that the sub-circuit which is insensitive to a change in the value of one of its inputs is selected whenever the output of the multiplexer changes.
    Type: Application
    Filed: October 19, 2012
    Publication date: September 4, 2014
    Applicant: Nelson Mandela Metropolitan University
    Inventor: Farouk Smith