Abstract: The present invention provides method of manufacturing a metal-insulator-metal capacitor (100). A method of manufacturing includes depositing a first refractory metal layer (105) over a semiconductor substrate (110). The first refractory metal layer (105) over a capacitor region (200) of the semiconductor substrate (110) is removed and a second refractory metal (300) is deposited over the capacitor region (200). Other aspects of the present invention include a metal-insulator-metal capacitor (900) and a method of manufacturing an integrated circuit (1000).

Abstract: The present invention provides method of manufacturing a metal-insulator-metal capacitor (100). A method of manufacturing includes depositing a first refractory metal layer (105) over a semiconductor substrate (110). The first refractory metal layer (105) over a capacitor region (200) of the semiconductor substrate (110) is removed and a second refractory metal (300) is deposited over the capacitor region (200). Other aspects of the present invention include a metal-insulator-metal capacitor (900) and a method of manufacturing an integrated circuit (1000).

Abstract: An embodiment of the instant invention is a method of implementing a vanishingly small integrated circuit diode comprising the steps of: forming an area of a thin dielectric film (201 of FIG. 2) over a conductive silicon surface ( 10 of FIG. 2) of one conductivity type in a region of a thick dielectric film (100 of FIG. 2) over the conductive silicon surface; forming a first conductive path from the conductive silicon surface to an operating circuit; forming a conductive silicon film (202 of FIG. 2) of a second conductivity type over the thin dielectric region; forming a second conductive path from the conductive silicon film to the operating circuit; and causing at least one region of the second conductivity type in the conductive silicon surface and at least one third conductive path through the thin dielectric film wherein said causing consists of applying a voltage or applying a current.

Abstract: The invention describes a method for gettering silicon on insulator wafers without forming regions of heavy doping. Silicon germanium layers (201, 304) are formed beneath silicon layers (200, 305) such that dislocations will form in the silicon germanium layers. These dislocations will serve to getter impurities.

Abstract: The invention describes a method for gettering silicon on insulator wafers without forming regions of heavy doping. Silicon germanium layers (201, 304) are formed beneath silicon layers (200, 305) such that dislocations will form in the silicon germanium layers. These dislocations will serve to getter impurities.

Abstract: A method of processing wafers containing a gate oxide assembly (10) is disclosed that reduces gate oxide damage during wafer production due to damage caused by charging. The method comprises creating an oxide gate assembly (10) on a silicon layer (11) in a production line chamber followed by the deposition of a polysilicon layer (22). Following the creation of the gate oxide assembly (10) a pressure of at least 1.2 Torr is maintained while lowering the power within the production line chamber. The invention can be used with a gate oxide layer (16) of less than 1000 angstroms.

Abstract: A method of processing wafers containing a gate oxide assembly (10) is disclosed that reduces gate oxide damage during wafer production due to damage caused by charging. The method comprises creating an oxide gate assembly (10) on a silicon layer (11) in a production line chamber followed by the deposition of a polysilicon layer (22). Following the creation of the gate oxide assembly (10) a pressure of at least 1.2 Torr is maintained while lowering the power within the production line chamber. The invention can be used with a gate oxide layer (16) of less than 1000 angstroms.