Abstract: Body to drain junction breakdown, due to avalanching in DMOST devices, can be controlled. The invention lowers the electric field gradients in the vicinity of the PN junction. The structure employed to enhance breakdown behavior is specifically applied to a vertical DMOST. The N type doping profile in the vicinity of the body to drain junction is tailored by constructing a P-nu-N-N.sup.+ type diode structure where nu is a low N type impurity concentration region. The N type region is of higher impurity concentration and is more extensive. With the nu region having one-half of the impurity concentration of the N region and an extent of about two microns, the avalanche breakdown voltage is about 27% higher than the conventional PN junction diode. By making the nu region impurity concentration one-fourth that of the N region, the breakdown voltage is 40% higher.

Abstract: A structure and method of fabricating same is provided for a deep junction, non-self-aligned MOS transistor for suppressing hot carrier injection. According to the invention, dopant is introduced into a semiconductor substrate of a first conductivity type to form first and second spaced-apart substrate regions of opposite conductivity in the substrate. The first and second regions will become the source and drain regions of a deep junction, non-self-aligned MOS transistor having an effective channel length less than about 3.5 microns. The junction depth of the source and drain regions is greater than about 4000 Angstroms. Next, a layer of dielectric material is formed over the substrate. A region of conductive material is then formed over the dielectric material to serve as the gate of the MOS device. The resulting deep junction device has improved reliability as compared to self-aligned MOS devices of comparable effective channel length.

Abstract: The present invention provides a single-poly electrically erasable programmable read only memory device which is formed in a semiconductor substrate of a first conductivity type. The memory device includes a pass cell comprising first and second regions of a second conductivity type, opposite to that of the first conductivity type, formed in the substrate. The first and second regions are separated by a first channel region formed by the substrate. A first conductive portion is formed over the first channel region and is separated from the first channel region by a dielectric material. A control cell comprising third and forth regions of the second conductivity type is also formed in the substrate. The third and forth regions are separated by a second channel region formed by the substrate. The first conductive portion extends over the second channel region and is separated from the second channel region by the dielectric material.