Patents by Inventor Fay Chong
Fay Chong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20070101045Abstract: Broadly speaking, an apparatus for efficiently utilizing a shared packet buffer memory in a switch and a method for operating the same is provided. More specifically, the apparatus includes a memory having a number of buffers configured to be operated in a ratcheted manner. The ratcheted manner in which the memory is operated causes each incoming data stream to be distributed across the number of buffers. Each stored data stream can also be retrieved from the number of buffers for output from the memory in a similar ratcheted manner. The memory uses a rotating selector to control the ratcheted manner of operation. Also, the memory is capable of simultaneously servicing each of a number of inputs and a number of outputs to which the memory is connected.Type: ApplicationFiled: November 1, 2006Publication date: May 3, 2007Applicant: Sun Microsystems, Inc.Inventors: Whay Lee, Walter Nixon, Fay Chong
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Publication number: 20050149554Abstract: Methods and systems preserving data in a data storage system are described. In one aspect of the invention, the exemplary process includes receiving a command to preserve data in a data storage system, executing for a first data a first I/O (input/output) process directed to a first storage volume wherein the first I/O process begins at a first time which is prior to receiving the command, creating a data structure, in response to the command, for at least a second image which corresponds to a second storage volume, writing a second data directed to the first storage volume as part of a second I/O process which begins after the first time, and determining from the data structure whether data corresponding to the second data is stored in the second image and if it is, modifying the data structure to indicate that the second data is not stored in the second image and storing the second data in the first image. Other methods and apparatuses are also described.Type: ApplicationFiled: December 29, 2003Publication date: July 7, 2005Inventor: Fay Chong
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Publication number: 20050149548Abstract: Methods and systems for one-way data mirror are described herein. In one aspect of the invention, the exemplary process includes receiving a first data being written to a data block on a first storage volume, indicating the data block being stored on a first storage image, the indication information being associated with a first storage image which is a copy on write snapshot, and writing the first data to the data block on the first storage image. Other methods and apparatuses are also described.Type: ApplicationFiled: December 29, 2003Publication date: July 7, 2005Inventor: Fay Chong
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Publication number: 20050149683Abstract: Techniques for preserving data in a data storage system are described herein. In one aspect, when a command to preserve data in a data storage system is received, a first input and output (I/O) process is executed in the data storage system which exists at a selected time relative to the command. A second I/O process is executed in the data storage system which begins after the selected time. The second I/O process being capable of executing while the first I/O process is executing, wherein the second I/O process is capable of accessing the same data, in the data processing system, as the first I/O process. Other methods and apparatuses are also described.Type: ApplicationFiled: December 29, 2003Publication date: July 7, 2005Inventors: Fay Chong, Whay Lee
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Publication number: 20050144406Abstract: Methods and systems for data storage are described herein. In one aspect of the invention, an exemplary process includes receiving a first data being directed to a first storage volume, receiving a second data being directed to a second storage volume, writing the first data, as part of a first I/O (input/output) process which begins before a selected time, to a first storage image and a second storage image, the first storage image and the second storage image forming a data mirror prior to the selected time, wherein writes to one image are replicated to the other image, and writing the second data, as part of a second I/O process which begins after the selected time, to the second storage image but not to the first storage image, the second I/O process being capable of running while the first process runs. Other methods and apparatuses are also described.Type: ApplicationFiled: December 29, 2003Publication date: June 30, 2005Inventor: Fay Chong
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Patent number: 6862666Abstract: A memory system is disclosed in which hardware assisted leases are utilized to control access to shared data resources among data users. The lease is a type of lock on content in the memory system that automatically expires after a preset period of time. The lease enables the lease owner exclusive use of the associated content in the memory system. Furthermore, the memory system has a memory access mechanism that is separate from the data users. The memory access mechanism includes hardware components to enforce lease-based access to the memory system. Since the lease expires rather than being permanently granted, no CPU or software thread is able to monopolize a lease forever. Moreover, since the lease-base access is hardware-assisted, faulty CPUs or software are prevented from unauthorized access to leased (or locked) content in which another CPU or software already holds a lease.Type: GrantFiled: May 16, 2002Date of Patent: March 1, 2005Assignee: Sun Microsystems, Inc.Inventors: Fay Chong, Nisha Talagala, Whay Sing Lee
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Publication number: 20050013302Abstract: Broadly speaking, an apparatus for efficiently utilizing a shared packet buffer memory in a switch and a method for operating the same is provided. More specifically, the apparatus includes a memory having a number of buffers configured to be operated in a ratcheted manner. The ratcheted manner in which the memory is operated causes each incoming data stream to be distributed across the number of buffers. Each stored data stream can also be retrieved from the number of buffers for output from the memory in a similar ratcheted manner. The memory uses a rotating selector to control the ratcheted manner of operation. Also, the memory is capable of simultaneously servicing each of a number of inputs and a number of outputs to which the memory is connected.Type: ApplicationFiled: July 17, 2003Publication date: January 20, 2005Applicant: Sun Microsystems, Inc.Inventors: Whay Lee, Walter Nixon, Fay Chong
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Publication number: 20050015556Abstract: Broadly speaking, a device for addressing a shared resource is disclosed. The device includes at least one register in communication with the shared resource. The at least one register is configured to hold an address that is to be provided to the shared resource upon receipt of a clock signal. The device also includes a multiplexer for providing a next address to the at least one register. The multiplexer is disposed outside of a critical timing path for addressing the shared resource. The device for addressing the shared resource allows multiple users to be connected to the shared resource without adversely affecting both a speed of the shared resource and a number of users that can be achieved in an actual implementation of the shared resource.Type: ApplicationFiled: July 17, 2003Publication date: January 20, 2005Applicant: Sun Microsystems, Inc.Inventors: Fay Chong, Walter Nixon, Whay Lee
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Publication number: 20050013323Abstract: Broadly speaking, a bandwidth matching device is provided for transforming a number of incoming data streams each having a first bandwidth into an outgoing data stream having a second bandwidth. More specifically, the bandwidth matching device provides an assembler and a disassembler. The assembler incorporates a stepped arrangement of cells for transforming the number of incoming data streams having a given bandwidth into an outgoing data stream having a larger bandwidth, wherein each portion of the outgoing data stream represents a concatenation of a number of portions of each of the incoming data streams. As a complement to the assembler, the disassembler uses a stepped arrangement of cells to transform the concatenated output generated by the assembler back into the number of incoming data streams originally received by the assembler.Type: ApplicationFiled: July 17, 2003Publication date: January 20, 2005Applicant: Sun Microsystems, Inc.Inventors: Walter Nixon, Whay Lee, Fay Chong
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Publication number: 20040158566Abstract: An embodiment of the invention provides a method for creating a snapshot of a data store. A command to create a snapshot of an original data store, stored to a parent virtual logical unit (VLU), is received. A deferred propagation data structure (DPDS) is associated with the parent VLU. The DPDS is capable of containing data propagation records and separators, each data propagation record contains a previous version of one or more data blocks of the parent VLU, each separator contains a pointer to a particular child VLU storing a snapshot of the original data store and separating the data propagation records pertaining to the particular child VLU. A child VLU to store the copy of the original data store is created. A new separator containing a pointer to the child VLU is created in the DPDS. A search pointer pointing to the DPDS is implemented in the child VLU.Type: ApplicationFiled: February 7, 2003Publication date: August 12, 2004Inventors: Fay Chong, Whay Sing Lee, Raghavendra J. Rao
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Publication number: 20040122911Abstract: An interconnecting device for a data processing system. The interconnecting device comprises a first plurality of connection ports for connecting to first components of the data processing system. The interconnecting device further comprises a second plurality of connection ports for connecting to second components of the data processing system. And, a cover is affixed over the first plurality of connection ports to restrict access to the first plurality of connection ports.Type: ApplicationFiled: December 19, 2002Publication date: June 24, 2004Inventors: Fay Chong, William L. Grouell
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Publication number: 20040120652Abstract: A light guide for an interconnecting device. The light guide comprises a first section having a Fibre Channel connector disposed therein and a second section having a Fibre Channel receptacle disposed therein. The second section is coupled to the first section. A mirror section is disposed within either the second section or the first section to direct light out the Fibre Channel receptacle.Type: ApplicationFiled: December 19, 2002Publication date: June 24, 2004Inventors: Fay Chong, William L. Grouell
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Publication number: 20040117567Abstract: An embodiment of the invention provides a method for improving efficiency in a system containing repeated snapshots of an original data store. A READ/WRITE enabled parent virtual logical unit (VLU) to store an original data store is created. One or more READ-only enabled child VLUs, each storing a point-in-time copy of the original data store, are created at distinct times. A search pointer and a propagation pointer are implemented on the parent VLU and on each child VLU. The search pointer of each child VLU is set to point to the next subsequently created child VLU, with the search pointer of a most recently created child VLU set to point to the parent VLU. The propagation pointer of each child VLU is set to point to the immediately previously created child VLU, with the propagation pointer of the parent VLU set to point to the most recently created child VLU.Type: ApplicationFiled: December 13, 2002Publication date: June 17, 2004Inventors: Whay Sing Lee, Raghavendra J. Rao, Fay Chong
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Publication number: 20040064638Abstract: In one embodiment, a disk array storage system includes multiple disk drive modules that contain sets of drives and a number of storage controllers. Each storage controller is connected to a group of disk drives from two or more disk drive modules. The number of disk drives from the same disk drive module that are connected to the storage controller does not exceed a predefined number.Type: ApplicationFiled: September 30, 2002Publication date: April 1, 2004Inventor: Fay Chong
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Publication number: 20030221056Abstract: A storage array interconnection fabric may be configured using a torus topology. A storage system including a path-redundant torus interconnection fabric is coupled to a plurality of nodes. The torus interconnection fabric may be configured to connect the plurality of nodes in an array including N rows and M columns, where N and M are positive integers. The array may be configured such that a first node in a first row of the N rows is connected to a second node in the first row and a first node in a first column of the M columns is connected to a second node in the first column. Also an ending node in the first row is connected to the first node in the first row and an ending node in the first column is connected to the first node in the first column. In addition, a first portion of the plurality of nodes is configured to communicate with a plurality of storage devices such as disk drives.Type: ApplicationFiled: December 18, 2000Publication date: November 27, 2003Inventors: Whay S. Lee, Randall D. Rettberg, Nisha D. Talagala, Chia Y. Wu, Fay Chong
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Publication number: 20030221018Abstract: A storage array interconnection fabric may be configured using multiple independent paths. A storage system including a plurality of communication paths is configured for connecting each node of a plurality of nodes forming an interconnection fabric. Each of the communications paths is an independent communications path. In addition, a first portion of the plurality of nodes is configured to communicate with a plurality of mass storage devices such as disk drives. A second portion of the plurality of nodes may be configured to communicate with a host.Type: ApplicationFiled: December 18, 2000Publication date: November 27, 2003Inventors: Whay S. Lee, Randall Rettberg, Nisha D. Talagala, Chia Y. Wu, Fay Chong
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Publication number: 20030217241Abstract: A memory system is disclosed in which hardware assisted leases are utilized to control access to shared data resources among data users. The lease is a type of lock on content in the memory system that automatically expires after a preset period of time. The lease enables the lease owner exclusive use of the associated content in the memory system. Furthermore, the memory system has a memory access mechanism that is separate from the data users. The memory access mechanism includes hardware components to enforce lease-based access to the memory system. Since the lease expires rather than being permanently granted, no CPU or software thread is able to monopolize a lease forever. Moreover, since the lease-base access is hardware-assisted, faulty CPUs or software are prevented from unauthorized access to leased (or locked) content in which another CPU or software already holds a lease.Type: ApplicationFiled: May 16, 2002Publication date: November 20, 2003Inventors: Fay Chong, Nisha Talagala, Whay Sing Lee
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Publication number: 20030191855Abstract: Systems and methods for routing messages in an interconnection fabric are provided. The fabric includes a plurality of nodes, each node having, for example, four ports coupled to adjacent nodes in the fabric. A source node initiating a message in the fabric can transmit the message out of one of its four ports. Between a source node and a destination node, there are at least four independent paths which may be taken, depending on the output port from the source node. However, the precise path is not expressly delineated in the message. Instead, the message contains the address of the destination node, the address of the originating node, and a target region for the message. Each intermediate node is configured to receive a message via one of its four ports, and then select an appropriate output port based on the location of the port which received the message combined with the address and target information contained in the message.Type: ApplicationFiled: March 21, 2002Publication date: October 9, 2003Inventors: Whay S. Lee, Nisha Talagala, Fay Chong, Chia Y. Wu, Randall D. Rettberg
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Publication number: 20030115416Abstract: An apparatus includes a memory, a functional unit configured to perform a block operation on one or more block operands to generate a block result, and a cache accumulator that includes multiple block storage locations. The cache accumulator is configured to receive a set of one or more instructions to perform a first accumulation operation. In response to receiving the first instruction in the set, the cache accumulator is configured to access an associativity list that includes an indication that a first set of the block storage locations are currently allocated to the first accumulation operation. In response to the indication, the cache accumulator is configured to provide the first block operand to the functional unit from the first set of the block storage locations and to store the block result into the first set of block storage locations.Type: ApplicationFiled: December 19, 2001Publication date: June 19, 2003Inventors: Walter T. Nixon, Fay Chong
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Publication number: 20030115418Abstract: Various embodiments of systems and methods for performing accumulation operations on block operands are disclosed. In one embodiment, an apparatus may include a memory, a functional unit that performs an operation on block operands, and a cache accumulator. The cache accumulator is configured to provide a block operand to the functional unit and to store the block result generated by the functional unit. The cache accumulator is configured to provide the block operand to the functional unit in response to an instruction that uses an address in the memory to identify the block operand. Thus, the cache accumulator behaves as both a cache and an accumulator.Type: ApplicationFiled: December 19, 2001Publication date: June 19, 2003Inventor: Fay Chong