Abstract: Embodiments of the present invention relate to the field of soldering sheets, and provided therein are an ultra-thin soldering gasket and a preparation method therefor, a soldering method, and a semiconductor device. The ultra-thin soldering gasket comprises: an internal support structure and a solder layer which covers a surface of the internal support structure, the solder layer being formed by uniformly attaching a solder liquid to the surface of the internal support structure. The preparation method for an ultra-thin soldering gasket comprises the following steps: immersing an internal support structure that has passed through a surface treatment process into a solder liquid, then removing same, and cooling. The soldering method based on the ultra-thin soldering gasket comprises: placing an ultra-thin soldering gasket between soldering surfaces to be soldered, and then performing reflux soldering to form a semiconductor device.

Abstract: The present invention relates to a thermal interface material layer and use thereof. The thermal interface material layer comprises an indium layer and a heat dissipation cover located on one side of the indium layer; the surface of the heat dissipation cover contains a nickel layer, and the nickel layer is connected to the indium layer. In the thermal interface material layer of the present invention, the nickel layer on the surface of the heat dissipation cover is connected to the indium layer, so as to form a Ni—In compound layer having high structure stability, thereby solving the problem that the AuIn2 compound layer formed by welding the indium layer and Au used as a wetting layer in the traditional thermal interface layer is easily fractured, improving the reliability of the assembly obtained by assembling same.

Abstract: An apparatus is provided which comprises: a planar dielectric surface, two or more conductive leads on the surface, the conductive leads extending away from the substrate surface, two or more conductive traces on the surface between the conductive leads, the traces substantially parallel to each other, and a wire coupling a first end of a first conductive trace to an opposite end of an adjacent second conductive trace, the wire extending away from the surface. Other embodiments are also disclosed and claimed.

Abstract: Embodiments of the present disclosure describe techniques for fabricating a stacked integrated circuit (IC) device. A first wafer that includes a plurality of first IC dies may be sorted to identify first known good dies of the plurality of first IC dies. The first wafer may be diced to singulate the first IC dies. A second wafer that includes a plurality of second IC dies may be sorted to identify second know good dies of the plurality of second IC dies. The first known good dies may be bonded to respective second known good dies of the second wafer. In some embodiments, the first known good dies may be thinned after bonding the first know good dies to the second wafer. Other embodiments may be described and/or claimed.

Abstract: Embodiments of the present disclosure describe techniques for fabricating a stacked integrated circuit (IC) device. A first wafer that includes a plurality of first IC dies may be sorted to identify first known good dies of the plurality of first IC dies. The first wafer may be diced to singulate the first IC dies. A second wafer that includes a plurality of second IC dies may be sorted to identify second know good dies of the plurality of second IC dies. The first known good dies may be bonded to respective second known good dies of the second wafer. In some embodiments, the first known good dies may be thinned after bonding the first know good dies to the second wafer. Other embodiments may be described and/or claimed.

Abstract: Embodiments include devices and methods, including a device including a substrate comprising a semiconductor, the substrate including a front side comprising active elements and a backside opposite the front side. The device includes a dielectric layer on the backside, and a passive component on the dielectric layer on the backside. In certain embodiments, the passive device is formed on a self-assembled monolayer (SAM). Other embodiments are described and claimed.

Abstract: Embodiments include devices and methods, including a method for processing a substrate. The method includes providing a substrate including a first portion and a second portion, the first portion including a feature, the feature including an electrically conductive region, the second portion including a dielectric surface region. The method also includes performing self-assembled monolayer (SAM) assisted structuring plating to form a structure comprising a metal on the dielectric surface region, the feature being formed using a process other than the SAM assisted structuring plating used to form the structure, and the structure being formed after the feature. Other embodiments are described and claimed.

Abstract: A method including activating an area of a polymer layer on a substrate with electromagnetic radiation; modifying the activated area; forming a self-assembled monolayer on the modified active area; reacting the self-assembled monolayer with the self-assembled monolayer; and reacting the self-assembled monolayer with a conductive material. A method including activating an area of a polymer dielectric layer on a substrate with electromagnetic radiation, the area selected for an electrically conductive line; modifying the activated area; forming a self-assembled monolayer on the modified active area; reacting the self-assembled monolayer with a catalyst; and electroless plating a conductive material on the self-assembled monolayer.

Abstract: Embodiments are generally directed to non-planar on-package via capacitor. An embodiment of an embedded capacitor includes a first plate that is formed in a package via; a dielectric layer that is applied on the first plate; and a second plate that is formed in a cavity in the dielectric layer, wherein the first plate and the second plate are non-planar plates.

Abstract: An apparatus is provided which comprises: a planar dielectric surface, two or more conductive leads on the surface, the conductive leads extending away from the substrate surface, two or more conductive traces on the surface between the conductive leads, the traces substantially parallel to each other, and a wire coupling a first end of a first conductive trace to an opposite end of an adjacent second conductive trace, the wire extending away from the surface. Other embodiments are also disclosed and claimed.

Abstract: Embodiments include devices and methods, including a device including a substrate comprising a semiconductor, the substrate including a front side comprising active elements and a backside opposite the front side. The device includes a dielectric layer on the backside, and a passive component on the dielectric layer on the backside. In certain embodiments, the passive device is formed on a self-assembled monolayer (SAM). Other embodiments are described and claimed.

Abstract: Embodiments include devices and methods, including a method for processing a substrate. The method includes providing a substrate including a first portion and a second portion, the first portion including a feature, the feature including an electrically conductive region, the second portion including a dielectric surface region. The method also includes performing self-assembled monolayer (SAM) assisted structuring plating to form a structure comprising a metal on the dielectric surface region, the feature being formed using a process other than the SAM assisted structuring plating used to form the structure, and the structure being formed after the feature. Other embodiments are described and claimed.

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations to provide solder contacts for electrical connection in socket assemblies. In one embodiment, a solder contact may be disposed on the bottom surface of a die package such that the solder contact is conductively coupled to electrical contacts of the die package. The solder contacts may be disposed to be coupled to pins of a socket assembly, to provide conductive coupling of the electrical contacts of the die package and the pins of the socket assembly. The solder may be selected to be sufficiently soft to provide for better electrical conduction. The pins may also be configured to penetrate the solder contact to provide for better electrical conduction. Other embodiments may be described and/or claimed.

Abstract: Embodiments include devices and methods, including a device including a substrate comprising a semiconductor, the substrate including a front side comprising active elements and a backside opposite the front side. The device includes a dielectric layer on the backside, and a passive component on the dielectric layer on the backside. In certain embodiments, the passive device is formed on a self-assembled monolayer (SAM). Other embodiments are described and claimed.

Abstract: Embodiments include devices and methods, including a method for processing a substrate. The method includes providing a substrate including a first portion and a second portion, the first portion including a feature, the feature including an electrically conductive region, the second portion including a dielectric surface region. The method also includes performing self-assembled monolayer (SAM) assisted structuring plating to form a structure comprising a metal on the dielectric surface region, the feature being formed using a process other than the SAM assisted structuring plating used to form the structure, and the structure being formed after the feature. Other embodiments are described and claimed.

Abstract: A method including activating an area of a polymer layer on a substrate with electromagnetic radiation; modifying the activated area; forming a self-assembled monolayer on the modified active area; reacting the self-assembled monolayer with the self-assembled monolayer; and reacting the self-assembled monolayer with a conductive material. A method including activating an area of a polymer dielectric layer on a substrate with electro-magnetic radiation, the area selected for an electrically conductive line; modifying the activated area; forming a self-assembled monolayer on the modified active area; reacting the self-assembled monolayer with a catalyst; and electroless plating a conductive material on the self-assembled monolayer.

Abstract: Embodiments include devices and methods, including a device including a substrate comprising a semiconductor, the substrate including a front side comprising active elements and a backside opposite the front side. The device includes a dielectric layer on the backside, and a passive component on the dielectric layer on the backside. In certain embodiments, the passive device is formed on a self-assembled monolayer (SAM). Other embodiments are described and claimed.

Abstract: Embodiments include devices and methods, including a method for processing a substrate. The method includes providing a substrate including a first portion and a second portion, the first portion including a feature, the feature including an electrically conductive region, the second portion including a dielectric surface region. The method also includes performing self-assembled monolayer (SAM) assisted structuring plating to form a structure comprising a metal on the dielectric surface region, the feature being formed using a process other than the SAM assisted structuring plating used to form the structure, and the structure being formed after the feature. Other embodiments are described and claimed.

Abstract: A wearable power source includes an elongated cylindrically-shaped flexible battery and at least one socket electrically connected to the elongated flexible battery. The at least one socket is operable to electrically connect the elongated cylindrically-shaped battery to at least one electronic device. The elongated battery is shaped to form jewelry. The at least one electronic device can also be decorated to look like jewelry. The jewelry can be worn where it can be seen, incorporated into a garment, or can be worn underneath a garment.

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations to provide solder contacts for electrical connection in socket assemblies. In one embodiment, a solder contact may be disposed on the bottom surface of a die package such that the solder contact is conductively coupled to electrical contacts of the die package. The solder contacts may be disposed to be coupled to pins of a socket assembly, to provide conductive coupling of the electrical contacts of the die package and the pins of the socket assembly. The solder may be selected to be sufficiently soft to provide for better electrical conduction. The pins may also be configured to penetrate the solder contact to provide for better electrical conduction. Other embodiments may be described and/or claimed.