Patents by Inventor Fayrushin Albert

Fayrushin Albert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Non-Volatile Memory Devices Having Reduced Susceptibility to Leakage of Stored Charges and Methods of Forming Same
    Publication number: 20110079839
    Abstract: Provided is a semiconductor device. The semiconductor device includes a substrate, a tunnel insulating layer, a charge storage pattern, a blocking layer, a gate electrode. The tunnel insulating layer is disposed over the substrate. The charge storage pattern is disposed over the tunnel insulating layer. The charge storage pattern has an upper surface, a sidewall, and an edge portion between the upper surface and the sidewall. The blocking layer includes an insulating pattern covering the edge portion of the charge storage pattern, and a gate dielectric layer covering the upper surface, the sidewall, and the edge portion of the charge storage pattern. The gate electrode is disposed over the blocking layer, the gate electrode covering the upper surface, the sidewall, and the edge portion of the charge storage pattern.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 7, 2011
    Inventors: Fayrushin Albert, Kwang Soo Seol, Jaeduk Lee